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@@ -588,6 +588,17 @@ static int wl18xx_identify_chip(struct wl1271 *wl)
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int ret = 0;
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switch (wl->chip.id) {
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+ case CHIP_ID_185x_PG20:
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+ wl1271_debug(DEBUG_BOOT, "chip id 0x%x (185x PG20)",
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+ wl->chip.id);
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+ wl->sr_fw_name = WL18XX_FW_NAME;
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+ /* wl18xx uses the same firmware for PLT */
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+ wl->plt_fw_name = WL18XX_FW_NAME;
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+ wl->quirks |= WLCORE_QUIRK_NO_ELP |
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+ WLCORE_QUIRK_FWLOG_NOT_IMPLEMENTED |
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+ WLCORE_QUIRK_RX_BLOCKSIZE_ALIGN;
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+
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+ break;
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case CHIP_ID_185x_PG10:
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wl1271_debug(DEBUG_BOOT, "chip id 0x%x (185x PG10)",
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wl->chip.id);
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@@ -602,7 +613,6 @@ static int wl18xx_identify_chip(struct wl1271 *wl)
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/* PG 1.0 has some problems with MCS_13, so disable it */
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wl->ht_cap[IEEE80211_BAND_2GHZ].mcs.rx_mask[1] &= ~BIT(5);
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- /* TODO: need to blocksize alignment for RX/TX separately? */
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break;
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default:
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wl1271_warning("unsupported chip id: 0x%x", wl->chip.id);
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