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@@ -13013,64 +13013,6 @@ static int bnx2x_84833_common_init_phy(struct bnx2x *bp,
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return 0;
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}
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-static int bnx2x_84833_pre_init_phy(struct bnx2x *bp,
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- struct bnx2x_phy *phy,
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- u8 port)
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-{
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- u16 val, cnt;
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- /* Wait for FW completing its initialization. */
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- for (cnt = 0; cnt < 1500; cnt++) {
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- bnx2x_cl45_read(bp, phy,
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- MDIO_PMA_DEVAD,
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- MDIO_PMA_REG_CTRL, &val);
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- if (!(val & (1<<15)))
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- break;
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- usleep_range(1000, 2000);
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- }
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- if (cnt >= 1500) {
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- DP(NETIF_MSG_LINK, "84833 reset timeout\n");
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- return -EINVAL;
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- }
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-
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- /* Put the port in super isolate mode. */
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- bnx2x_cl45_read(bp, phy,
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- MDIO_CTL_DEVAD,
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- MDIO_84833_TOP_CFG_XGPHY_STRAP1, &val);
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- val |= MDIO_84833_SUPER_ISOLATE;
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- bnx2x_cl45_write(bp, phy,
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- MDIO_CTL_DEVAD,
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- MDIO_84833_TOP_CFG_XGPHY_STRAP1, val);
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-
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- /* Save spirom version */
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- bnx2x_save_848xx_spirom_version(phy, bp, port);
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- return 0;
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-}
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-
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-int bnx2x_pre_init_phy(struct bnx2x *bp,
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- u32 shmem_base,
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- u32 shmem2_base,
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- u32 chip_id,
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- u8 port)
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-{
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- int rc = 0;
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- struct bnx2x_phy phy;
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- if (bnx2x_populate_phy(bp, EXT_PHY1, shmem_base, shmem2_base,
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- port, &phy) != 0) {
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- DP(NETIF_MSG_LINK, "populate_phy failed\n");
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- return -EINVAL;
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- }
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- bnx2x_set_mdio_clk(bp, chip_id, phy.mdio_ctrl);
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- switch (phy.type) {
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- case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833:
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- case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84834:
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- rc = bnx2x_84833_pre_init_phy(bp, &phy, port);
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- break;
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- default:
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- break;
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- }
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- return rc;
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-}
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-
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static int bnx2x_ext_phy_common_init(struct bnx2x *bp, u32 shmem_base_path[],
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u32 shmem2_base_path[], u8 phy_index,
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u32 ext_phy_type, u32 chip_id)
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