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@@ -54,10 +54,16 @@
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#define MCI_DPSM_MODE (1 << 2)
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#define MCI_DPSM_DMAENABLE (1 << 3)
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#define MCI_DPSM_BLOCKSIZE (1 << 4)
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-#define MCI_DPSM_RWSTART (1 << 8)
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-#define MCI_DPSM_RWSTOP (1 << 9)
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-#define MCI_DPSM_RWMOD (1 << 10)
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-#define MCI_DPSM_SDIOEN (1 << 11)
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+/* Control register extensions in the ST Micro U300 and Ux500 versions */
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+#define MCI_ST_DPSM_RWSTART (1 << 8)
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+#define MCI_ST_DPSM_RWSTOP (1 << 9)
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+#define MCI_ST_DPSM_RWMOD (1 << 10)
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+#define MCI_ST_DPSM_SDIOEN (1 << 11)
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+/* Control register extensions in the ST Micro Ux500 versions */
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+#define MCI_ST_DPSM_DMAREQCTL (1 << 12)
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+#define MCI_ST_DPSM_DBOOTMODEEN (1 << 13)
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+#define MCI_ST_DPSM_BUSYMODE (1 << 14)
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+#define MCI_ST_DPSM_DDRMODE (1 << 15)
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#define MMCIDATACNT 0x030
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#define MMCISTATUS 0x034
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