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@@ -306,6 +306,16 @@ static struct device *chan2dev(struct d40_chan *d40c)
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return &d40c->chan.dev->device;
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return &d40c->chan.dev->device;
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}
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}
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+static bool chan_is_physical(struct d40_chan *chan)
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+{
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+ return chan->log_num == D40_PHY_CHAN;
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+}
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+
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+static bool chan_is_logical(struct d40_chan *chan)
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+{
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+ return !chan_is_physical(chan);
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+}
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+
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static void __iomem *chan_base(struct d40_chan *chan)
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static void __iomem *chan_base(struct d40_chan *chan)
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{
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{
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return chan->base->virtbase + D40_DREG_PCBASE +
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return chan->base->virtbase + D40_DREG_PCBASE +
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@@ -400,7 +410,7 @@ static int d40_lcla_free_all(struct d40_chan *d40c,
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int i;
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int i;
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int ret = -EINVAL;
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int ret = -EINVAL;
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- if (d40c->log_num == D40_PHY_CHAN)
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+ if (chan_is_physical(d40c))
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return 0;
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return 0;
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spin_lock_irqsave(&d40c->base->lcla_pool.lock, flags);
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spin_lock_irqsave(&d40c->base->lcla_pool.lock, flags);
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@@ -472,7 +482,7 @@ static void d40_desc_load(struct d40_chan *d40c, struct d40_desc *d40d)
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{
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{
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int curr_lcla = -EINVAL, next_lcla;
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int curr_lcla = -EINVAL, next_lcla;
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- if (d40c->log_num == D40_PHY_CHAN) {
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+ if (chan_is_physical(d40c)) {
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d40_phy_lli_write(d40c->base->virtbase,
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d40_phy_lli_write(d40c->base->virtbase,
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d40c->phy_chan->num,
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d40c->phy_chan->num,
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d40d->lli_phy.dst,
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d40d->lli_phy.dst,
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@@ -788,7 +798,7 @@ static u32 d40_get_prmo(struct d40_chan *d40c)
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= D40_DREG_PRMO_LCHAN_SRC_LOG_DST_LOG,
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= D40_DREG_PRMO_LCHAN_SRC_LOG_DST_LOG,
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};
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};
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- if (d40c->log_num == D40_PHY_CHAN)
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+ if (chan_is_physical(d40c))
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return phy_map[d40c->dma_cfg.mode_opt];
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return phy_map[d40c->dma_cfg.mode_opt];
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else
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else
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return log_map[d40c->dma_cfg.mode_opt];
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return log_map[d40c->dma_cfg.mode_opt];
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@@ -802,7 +812,7 @@ static void d40_config_write(struct d40_chan *d40c)
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/* Odd addresses are even addresses + 4 */
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/* Odd addresses are even addresses + 4 */
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addr_base = (d40c->phy_chan->num % 2) * 4;
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addr_base = (d40c->phy_chan->num % 2) * 4;
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/* Setup channel mode to logical or physical */
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/* Setup channel mode to logical or physical */
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- var = ((u32)(d40c->log_num != D40_PHY_CHAN) + 1) <<
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+ var = ((u32)(chan_is_logical(d40c)) + 1) <<
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D40_CHAN_POS(d40c->phy_chan->num);
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D40_CHAN_POS(d40c->phy_chan->num);
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writel(var, d40c->base->virtbase + D40_DREG_PRMSE + addr_base);
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writel(var, d40c->base->virtbase + D40_DREG_PRMSE + addr_base);
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@@ -811,7 +821,7 @@ static void d40_config_write(struct d40_chan *d40c)
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writel(var, d40c->base->virtbase + D40_DREG_PRMOE + addr_base);
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writel(var, d40c->base->virtbase + D40_DREG_PRMOE + addr_base);
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- if (d40c->log_num != D40_PHY_CHAN) {
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+ if (chan_is_logical(d40c)) {
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int lidx = (d40c->phy_chan->num << D40_SREG_ELEM_LOG_LIDX_POS)
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int lidx = (d40c->phy_chan->num << D40_SREG_ELEM_LOG_LIDX_POS)
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& D40_SREG_ELEM_LOG_LIDX_MASK;
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& D40_SREG_ELEM_LOG_LIDX_MASK;
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void __iomem *chanbase = chan_base(d40c);
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void __iomem *chanbase = chan_base(d40c);
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@@ -830,7 +840,7 @@ static u32 d40_residue(struct d40_chan *d40c)
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{
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{
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u32 num_elt;
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u32 num_elt;
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- if (d40c->log_num != D40_PHY_CHAN)
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+ if (chan_is_logical(d40c))
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num_elt = (readl(&d40c->lcpa->lcsp2) & D40_MEM_LCSP2_ECNT_MASK)
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num_elt = (readl(&d40c->lcpa->lcsp2) & D40_MEM_LCSP2_ECNT_MASK)
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>> D40_MEM_LCSP2_ECNT_POS;
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>> D40_MEM_LCSP2_ECNT_POS;
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else {
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else {
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@@ -846,7 +856,7 @@ static bool d40_tx_is_linked(struct d40_chan *d40c)
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{
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{
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bool is_link;
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bool is_link;
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- if (d40c->log_num != D40_PHY_CHAN)
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+ if (chan_is_logical(d40c))
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is_link = readl(&d40c->lcpa->lcsp3) & D40_MEM_LCSP3_DLOS_MASK;
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is_link = readl(&d40c->lcpa->lcsp3) & D40_MEM_LCSP3_DLOS_MASK;
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else
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else
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is_link = readl(chan_base(d40c) + D40_CHAN_REG_SDLNK)
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is_link = readl(chan_base(d40c) + D40_CHAN_REG_SDLNK)
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@@ -869,7 +879,7 @@ static int d40_pause(struct dma_chan *chan)
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res = d40_channel_execute_command(d40c, D40_DMA_SUSPEND_REQ);
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res = d40_channel_execute_command(d40c, D40_DMA_SUSPEND_REQ);
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if (res == 0) {
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if (res == 0) {
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- if (d40c->log_num != D40_PHY_CHAN) {
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+ if (chan_is_logical(d40c)) {
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d40_config_set_event(d40c, false);
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d40_config_set_event(d40c, false);
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/* Resume the other logical channels if any */
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/* Resume the other logical channels if any */
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if (d40_chan_has_events(d40c))
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if (d40_chan_has_events(d40c))
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@@ -895,7 +905,7 @@ static int d40_resume(struct dma_chan *chan)
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spin_lock_irqsave(&d40c->lock, flags);
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spin_lock_irqsave(&d40c->lock, flags);
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if (d40c->base->rev == 0)
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if (d40c->base->rev == 0)
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- if (d40c->log_num != D40_PHY_CHAN) {
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+ if (chan_is_logical(d40c)) {
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res = d40_channel_execute_command(d40c,
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res = d40_channel_execute_command(d40c,
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D40_DMA_SUSPEND_REQ);
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D40_DMA_SUSPEND_REQ);
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goto no_suspend;
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goto no_suspend;
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@@ -904,7 +914,7 @@ static int d40_resume(struct dma_chan *chan)
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/* If bytes left to transfer or linked tx resume job */
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/* If bytes left to transfer or linked tx resume job */
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if (d40_residue(d40c) || d40_tx_is_linked(d40c)) {
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if (d40_residue(d40c) || d40_tx_is_linked(d40c)) {
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- if (d40c->log_num != D40_PHY_CHAN)
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+ if (chan_is_logical(d40c))
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d40_config_set_event(d40c, true);
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d40_config_set_event(d40c, true);
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res = d40_channel_execute_command(d40c, D40_DMA_RUN);
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res = d40_channel_execute_command(d40c, D40_DMA_RUN);
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@@ -944,7 +954,7 @@ static int d40_start(struct d40_chan *d40c)
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if (d40c->base->rev == 0) {
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if (d40c->base->rev == 0) {
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int err;
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int err;
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- if (d40c->log_num != D40_PHY_CHAN) {
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+ if (chan_is_logical(d40c)) {
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err = d40_channel_execute_command(d40c,
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err = d40_channel_execute_command(d40c,
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D40_DMA_SUSPEND_REQ);
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D40_DMA_SUSPEND_REQ);
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if (err)
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if (err)
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@@ -952,7 +962,7 @@ static int d40_start(struct d40_chan *d40c)
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}
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}
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}
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}
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- if (d40c->log_num != D40_PHY_CHAN)
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+ if (chan_is_logical(d40c))
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d40_config_set_event(d40c, true);
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d40_config_set_event(d40c, true);
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return d40_channel_execute_command(d40c, D40_DMA_RUN);
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return d40_channel_execute_command(d40c, D40_DMA_RUN);
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@@ -1495,7 +1505,7 @@ static int d40_free_dma(struct d40_chan *d40c)
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return res;
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return res;
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}
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}
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- if (d40c->log_num != D40_PHY_CHAN) {
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+ if (chan_is_logical(d40c)) {
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/* Release logical channel, deactivate the event line */
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/* Release logical channel, deactivate the event line */
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d40_config_set_event(d40c, false);
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d40_config_set_event(d40c, false);
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@@ -1548,7 +1558,7 @@ static bool d40_is_paused(struct d40_chan *d40c)
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spin_lock_irqsave(&d40c->lock, flags);
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spin_lock_irqsave(&d40c->lock, flags);
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- if (d40c->log_num == D40_PHY_CHAN) {
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+ if (chan_is_physical(d40c)) {
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if (d40c->phy_chan->num % 2 == 0)
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if (d40c->phy_chan->num % 2 == 0)
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active_reg = d40c->base->virtbase + D40_DREG_ACTIVE;
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active_reg = d40c->base->virtbase + D40_DREG_ACTIVE;
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else
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else
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@@ -1638,7 +1648,7 @@ struct dma_async_tx_descriptor *stedma40_memcpy_sg(struct dma_chan *chan,
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d40d->lli_current = 0;
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d40d->lli_current = 0;
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d40d->txd.flags = dma_flags;
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d40d->txd.flags = dma_flags;
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- if (d40c->log_num != D40_PHY_CHAN) {
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+ if (chan_is_logical(d40c)) {
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if (d40_pool_lli_alloc(d40d, d40d->lli_len, true) < 0) {
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if (d40_pool_lli_alloc(d40d, d40d->lli_len, true) < 0) {
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dev_err(&d40c->chan.dev->device,
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dev_err(&d40c->chan.dev->device,
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@@ -1765,9 +1775,9 @@ static int d40_alloc_chan_resources(struct dma_chan *chan)
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/* Fill in basic CFG register values */
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/* Fill in basic CFG register values */
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d40_phy_cfg(&d40c->dma_cfg, &d40c->src_def_cfg,
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d40_phy_cfg(&d40c->dma_cfg, &d40c->src_def_cfg,
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- &d40c->dst_def_cfg, d40c->log_num != D40_PHY_CHAN);
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+ &d40c->dst_def_cfg, chan_is_logical(d40c));
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- if (d40c->log_num != D40_PHY_CHAN) {
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+ if (chan_is_logical(d40c)) {
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d40_log_cfg(&d40c->dma_cfg,
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d40_log_cfg(&d40c->dma_cfg,
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&d40c->log_def.lcsp1, &d40c->log_def.lcsp3);
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&d40c->log_def.lcsp1, &d40c->log_def.lcsp3);
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@@ -1857,7 +1867,7 @@ static struct dma_async_tx_descriptor *d40_prep_memcpy(struct dma_chan *chan,
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d40d->txd.tx_submit = d40_tx_submit;
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d40d->txd.tx_submit = d40_tx_submit;
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- if (d40c->log_num != D40_PHY_CHAN) {
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+ if (chan_is_logical(d40c)) {
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if (d40_pool_lli_alloc(d40d, d40d->lli_len, true) < 0) {
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if (d40_pool_lli_alloc(d40d, d40d->lli_len, true) < 0) {
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dev_err(&d40c->chan.dev->device,
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dev_err(&d40c->chan.dev->device,
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@@ -2093,7 +2103,7 @@ static struct dma_async_tx_descriptor *d40_prep_slave_sg(struct dma_chan *chan,
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if (d40d == NULL)
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if (d40d == NULL)
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goto err;
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goto err;
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- if (d40c->log_num != D40_PHY_CHAN)
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+ if (chan_is_logical(d40c))
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err = d40_prep_slave_sg_log(d40d, d40c, sgl, sg_len,
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err = d40_prep_slave_sg_log(d40d, d40c, sgl, sg_len,
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direction, dma_flags);
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direction, dma_flags);
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else
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else
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@@ -2103,7 +2113,7 @@ static struct dma_async_tx_descriptor *d40_prep_slave_sg(struct dma_chan *chan,
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dev_err(&d40c->chan.dev->device,
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dev_err(&d40c->chan.dev->device,
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"[%s] Failed to prepare %s slave sg job: %d\n",
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"[%s] Failed to prepare %s slave sg job: %d\n",
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__func__,
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__func__,
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- d40c->log_num != D40_PHY_CHAN ? "log" : "phy", err);
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+ chan_is_logical(d40c) ? "log" : "phy", err);
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goto err;
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goto err;
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}
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}
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@@ -2253,7 +2263,7 @@ static void d40_set_runtime_config(struct dma_chan *chan,
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return;
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return;
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}
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}
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- if (d40c->log_num != D40_PHY_CHAN) {
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+ if (chan_is_logical(d40c)) {
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if (config_maxburst >= 16)
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if (config_maxburst >= 16)
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psize = STEDMA40_PSIZE_LOG_16;
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psize = STEDMA40_PSIZE_LOG_16;
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else if (config_maxburst >= 8)
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else if (config_maxburst >= 8)
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@@ -2286,7 +2296,7 @@ static void d40_set_runtime_config(struct dma_chan *chan,
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cfg->dst_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL;
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cfg->dst_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL;
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/* Fill in register values */
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/* Fill in register values */
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- if (d40c->log_num != D40_PHY_CHAN)
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+ if (chan_is_logical(d40c))
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d40_log_cfg(cfg, &d40c->log_def.lcsp1, &d40c->log_def.lcsp3);
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d40_log_cfg(cfg, &d40c->log_def.lcsp1, &d40c->log_def.lcsp3);
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else
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else
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d40_phy_cfg(cfg, &d40c->src_def_cfg,
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d40_phy_cfg(cfg, &d40c->src_def_cfg,
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