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@@ -47,7 +47,7 @@ static iomux_v3_cfg_t eukrea_mbimxsd_pads[] = {
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/* LED */
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/* LED */
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MX51_PAD_NANDF_D10__GPIO3_30,
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MX51_PAD_NANDF_D10__GPIO3_30,
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/* SWITCH */
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/* SWITCH */
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- _MX51_PAD_NANDF_D9__GPIO3_31 | MUX_PAD_CTRL(PAD_CTL_PUS_22K_UP |
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+ NEW_PAD_CTRL(MX51_PAD_NANDF_D9__GPIO3_31, PAD_CTL_PUS_22K_UP |
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PAD_CTL_PKE | PAD_CTL_SRE_FAST |
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PAD_CTL_PKE | PAD_CTL_SRE_FAST |
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PAD_CTL_DSE_HIGH | PAD_CTL_PUE | PAD_CTL_HYS),
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PAD_CTL_DSE_HIGH | PAD_CTL_PUE | PAD_CTL_HYS),
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/* UART2 */
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/* UART2 */
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@@ -66,7 +66,7 @@ static iomux_v3_cfg_t eukrea_mbimxsd_pads[] = {
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MX51_PAD_SD1_DATA2__SD1_DATA2,
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MX51_PAD_SD1_DATA2__SD1_DATA2,
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MX51_PAD_SD1_DATA3__SD1_DATA3,
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MX51_PAD_SD1_DATA3__SD1_DATA3,
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/* SD1 CD */
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/* SD1 CD */
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- _MX51_PAD_GPIO1_0__SD1_CD | MUX_PAD_CTRL(PAD_CTL_PUS_22K_UP |
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+ NEW_PAD_CTRL(MX51_PAD_GPIO1_0__SD1_CD, PAD_CTL_PUS_22K_UP |
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PAD_CTL_PKE | PAD_CTL_SRE_FAST |
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PAD_CTL_PKE | PAD_CTL_SRE_FAST |
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PAD_CTL_DSE_HIGH | PAD_CTL_PUE | PAD_CTL_HYS),
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PAD_CTL_DSE_HIGH | PAD_CTL_PUE | PAD_CTL_HYS),
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};
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};
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