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More .set to keep 32-bit processors happy.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Ralf Baechle 20 years ago
parent
commit
7222424e2e
1 changed files with 4 additions and 0 deletions
  1. 4 0
      include/asm-mips/system.h

+ 4 - 0
include/asm-mips/system.h

@@ -178,7 +178,9 @@ static inline unsigned long __xchg_u32(volatile int * m, unsigned int val)
 		__asm__ __volatile__(
 		__asm__ __volatile__(
 		"	.set	mips3					\n"
 		"	.set	mips3					\n"
 		"1:	ll	%0, %3			# xchg_u32	\n"
 		"1:	ll	%0, %3			# xchg_u32	\n"
+		"	.set	mips0					\n"
 		"	move	%2, %z4					\n"
 		"	move	%2, %z4					\n"
+		"	.set	mips3					\n"
 		"	sc	%2, %1					\n"
 		"	sc	%2, %1					\n"
 		"	beqzl	%2, 1b					\n"
 		"	beqzl	%2, 1b					\n"
 		ROT_IN_PIECES
 		ROT_IN_PIECES
@@ -195,7 +197,9 @@ static inline unsigned long __xchg_u32(volatile int * m, unsigned int val)
 		__asm__ __volatile__(
 		__asm__ __volatile__(
 		"	.set	mips3					\n"
 		"	.set	mips3					\n"
 		"1:	ll	%0, %3			# xchg_u32	\n"
 		"1:	ll	%0, %3			# xchg_u32	\n"
+		"	.set	mips0					\n"
 		"	move	%2, %z4					\n"
 		"	move	%2, %z4					\n"
+		"	.set	mips3					\n"
 		"	sc	%2, %1					\n"
 		"	sc	%2, %1					\n"
 		"	beqz	%2, 1b					\n"
 		"	beqz	%2, 1b					\n"
 #ifdef CONFIG_SMP
 #ifdef CONFIG_SMP