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@@ -13,11 +13,10 @@
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* Modification for compressed loader:
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* Copyright (C) 2002 Stuart Menefy (stuart.menefy@st.com)
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*/
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-
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#include <linux/linkage.h>
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-#include <asm/registers.h>
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#include <asm/cache.h>
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-#include <asm/mmu_context.h>
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+#include <asm/cpu/mmu_context.h>
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+#include <asm/cpu/registers.h>
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/*
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* Fixed TLB entries to identity map the beginning of RAM
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@@ -51,14 +50,14 @@ startup:
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* uninitialized target registers.
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* This must be executed before the first branch.
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*/
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- ptabs/u ZERO, tr0
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- ptabs/u ZERO, tr1
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- ptabs/u ZERO, tr2
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- ptabs/u ZERO, tr3
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- ptabs/u ZERO, tr4
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- ptabs/u ZERO, tr5
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- ptabs/u ZERO, tr6
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- ptabs/u ZERO, tr7
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+ ptabs/u r63, tr0
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+ ptabs/u r63, tr1
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+ ptabs/u r63, tr2
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+ ptabs/u r63, tr3
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+ ptabs/u r63, tr4
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+ ptabs/u r63, tr5
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+ ptabs/u r63, tr6
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+ ptabs/u r63, tr7
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synci
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/*
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@@ -69,7 +68,7 @@ startup:
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pta 1f, tr1
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movi ITLB_FIXED, r21
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movi ITLB_LAST_VAR_UNRESTRICTED+TLB_STEP, r22
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-1: putcfg r21, 0, ZERO /* Clear MMUIR[n].PTEH.V */
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+1: putcfg r21, 0, r63 /* Clear MMUIR[n].PTEH.V */
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addi r21, TLB_STEP, r21
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bne r21, r22, tr1
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@@ -77,7 +76,7 @@ startup:
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pta 1f, tr1
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movi DTLB_FIXED, r21
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movi DTLB_LAST_VAR_UNRESTRICTED+TLB_STEP, r22
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-1: putcfg r21, 0, ZERO /* Clear MMUDR[n].PTEH.V */
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+1: putcfg r21, 0, r63 /* Clear MMUDR[n].PTEH.V */
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addi r21, TLB_STEP, r21
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bne r21, r22, tr1
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@@ -133,7 +132,7 @@ startup:
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pt 1f, tr1
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movi datalabel __bss_start, r22
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movi datalabel _end, r23
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-1: st.l r22, 0, ZERO
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+1: st.l r22, 0, r63
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addi r22, 4, r22
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bne r22, r23, tr1
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@@ -161,4 +160,4 @@ startup:
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/* Shouldn't return here, but just in case, loop forever */
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pt 1f, tr0
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-1: blink tr0, ZERO
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+1: blink tr0, r63
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