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@@ -1100,6 +1100,8 @@ enum pci_board_num_t {
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pbn_b0_4_1843200_200,
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pbn_b0_8_1843200_200,
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+ pbn_b0_1_4000000,
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+
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pbn_b0_bt_1_115200,
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pbn_b0_bt_2_115200,
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pbn_b0_bt_8_115200,
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@@ -1167,6 +1169,10 @@ enum pci_board_num_t {
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pbn_exsys_4055,
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pbn_plx_romulus,
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pbn_oxsemi,
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+ pbn_oxsemi_1_4000000,
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+ pbn_oxsemi_2_4000000,
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+ pbn_oxsemi_4_4000000,
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+ pbn_oxsemi_8_4000000,
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pbn_intel_i960,
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pbn_sgi_ioc3,
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pbn_computone_4,
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@@ -1290,6 +1296,12 @@ static struct pciserial_board pci_boards[] __devinitdata = {
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.base_baud = 1843200,
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.uart_offset = 0x200,
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},
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+ [pbn_b0_1_4000000] = {
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+ .flags = FL_BASE0,
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+ .num_ports = 1,
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+ .base_baud = 4000000,
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+ .uart_offset = 8,
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+ },
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[pbn_b0_bt_1_115200] = {
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.flags = FL_BASE0|FL_BASE_BARS,
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@@ -1625,6 +1637,35 @@ static struct pciserial_board pci_boards[] __devinitdata = {
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.base_baud = 115200,
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.uart_offset = 8,
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},
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+ [pbn_oxsemi_1_4000000] = {
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+ .flags = FL_BASE0,
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+ .num_ports = 1,
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+ .base_baud = 4000000,
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+ .uart_offset = 0x200,
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+ .first_offset = 0x1000,
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+ },
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+ [pbn_oxsemi_2_4000000] = {
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+ .flags = FL_BASE0,
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+ .num_ports = 2,
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+ .base_baud = 4000000,
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+ .uart_offset = 0x200,
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+ .first_offset = 0x1000,
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+ },
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+ [pbn_oxsemi_4_4000000] = {
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+ .flags = FL_BASE0,
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+ .num_ports = 4,
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+ .base_baud = 4000000,
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+ .uart_offset = 0x200,
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+ .first_offset = 0x1000,
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+ },
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+ [pbn_oxsemi_8_4000000] = {
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+ .flags = FL_BASE0,
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+ .num_ports = 8,
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+ .base_baud = 4000000,
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+ .uart_offset = 0x200,
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+ .first_offset = 0x1000,
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+ },
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+
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/*
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* EKF addition for i960 Boards form EKF with serial port.
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@@ -1813,6 +1854,34 @@ serial_pci_matches(struct pciserial_board *board,
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board->first_offset == guessed->first_offset;
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}
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+/*
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+ * Oxford Semiconductor Inc.
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+ * Check that device is part of the Tornado range of devices, then determine
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+ * the number of ports available on the device.
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+ */
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+static int pci_oxsemi_tornado_init(struct pci_dev *dev, struct pciserial_board *board)
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+{
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+ u8 __iomem *p;
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+ unsigned long deviceID;
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+ unsigned int number_uarts;
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+
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+ p = pci_iomap(dev, 0, 5);
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+ if (p == NULL)
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+ return -ENOMEM;
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+
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+ deviceID = ioread32(p);
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+ /* Tornado device */
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+ if (deviceID == 0x07000200) {
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+ number_uarts = ioread8(p + 4);
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+ board->num_ports = number_uarts;
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+ printk(KERN_DEBUG
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+ "%d ports detected on Oxford PCI Express device\n",
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+ number_uarts);
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+ }
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+ pci_iounmap(dev, p);
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+ return 0;
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+}
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+
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struct serial_private *
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pciserial_init_ports(struct pci_dev *dev, struct pciserial_board *board)
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{
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@@ -1821,6 +1890,12 @@ pciserial_init_ports(struct pci_dev *dev, struct pciserial_board *board)
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struct pci_serial_quirk *quirk;
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int rc, nr_ports, i;
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+ /*
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+ * Find number of ports on board
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+ */
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+ if (dev->vendor == PCI_VENDOR_ID_OXSEMI)
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+ pci_oxsemi_tornado_init(dev, board);
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+
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nr_ports = board->num_ports;
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/*
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@@ -2300,6 +2375,142 @@ static struct pci_device_id serial_pci_tbl[] = {
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_b0_bt_2_921600 },
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+ /*
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+ * Oxford Semiconductor Inc. Tornado PCI express device range.
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+ */
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+ { PCI_VENDOR_ID_OXSEMI, 0xc101, /* OXPCIe952 1 Legacy UART */
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+ PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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+ pbn_b0_1_4000000 },
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+ { PCI_VENDOR_ID_OXSEMI, 0xc105, /* OXPCIe952 1 Legacy UART */
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+ PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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+ pbn_b0_1_4000000 },
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+ { PCI_VENDOR_ID_OXSEMI, 0xc11b, /* OXPCIe952 1 Native UART */
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+ PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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+ pbn_oxsemi_1_4000000 },
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+ { PCI_VENDOR_ID_OXSEMI, 0xc11f, /* OXPCIe952 1 Native UART */
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+ PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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+ pbn_oxsemi_1_4000000 },
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+ { PCI_VENDOR_ID_OXSEMI, 0xc120, /* OXPCIe952 1 Legacy UART */
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+ PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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+ pbn_b0_1_4000000 },
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+ { PCI_VENDOR_ID_OXSEMI, 0xc124, /* OXPCIe952 1 Legacy UART */
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+ PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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+ pbn_b0_1_4000000 },
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+ { PCI_VENDOR_ID_OXSEMI, 0xc138, /* OXPCIe952 1 Native UART */
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+ PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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+ pbn_oxsemi_1_4000000 },
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+ { PCI_VENDOR_ID_OXSEMI, 0xc13d, /* OXPCIe952 1 Native UART */
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+ PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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+ pbn_oxsemi_1_4000000 },
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+ { PCI_VENDOR_ID_OXSEMI, 0xc140, /* OXPCIe952 1 Legacy UART */
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+ PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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+ pbn_b0_1_4000000 },
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+ { PCI_VENDOR_ID_OXSEMI, 0xc141, /* OXPCIe952 1 Legacy UART */
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+ PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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+ pbn_b0_1_4000000 },
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+ { PCI_VENDOR_ID_OXSEMI, 0xc144, /* OXPCIe952 1 Legacy UART */
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+ PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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+ pbn_b0_1_4000000 },
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+ { PCI_VENDOR_ID_OXSEMI, 0xc145, /* OXPCIe952 1 Legacy UART */
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+ PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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+ pbn_b0_1_4000000 },
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+ { PCI_VENDOR_ID_OXSEMI, 0xc158, /* OXPCIe952 2 Native UART */
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+ PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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+ pbn_oxsemi_2_4000000 },
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+ { PCI_VENDOR_ID_OXSEMI, 0xc15d, /* OXPCIe952 2 Native UART */
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+ PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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+ pbn_oxsemi_2_4000000 },
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+ { PCI_VENDOR_ID_OXSEMI, 0xc208, /* OXPCIe954 4 Native UART */
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+ PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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+ pbn_oxsemi_4_4000000 },
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+ { PCI_VENDOR_ID_OXSEMI, 0xc20d, /* OXPCIe954 4 Native UART */
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+ PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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+ pbn_oxsemi_4_4000000 },
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+ { PCI_VENDOR_ID_OXSEMI, 0xc308, /* OXPCIe958 8 Native UART */
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+ PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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+ pbn_oxsemi_8_4000000 },
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+ { PCI_VENDOR_ID_OXSEMI, 0xc30d, /* OXPCIe958 8 Native UART */
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+ PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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+ pbn_oxsemi_8_4000000 },
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+ { PCI_VENDOR_ID_OXSEMI, 0xc40b, /* OXPCIe200 1 Native UART */
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+ PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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+ pbn_oxsemi_1_4000000 },
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+ { PCI_VENDOR_ID_OXSEMI, 0xc40f, /* OXPCIe200 1 Native UART */
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+ PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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+ pbn_oxsemi_1_4000000 },
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+ { PCI_VENDOR_ID_OXSEMI, 0xc41b, /* OXPCIe200 1 Native UART */
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+ PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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+ pbn_oxsemi_1_4000000 },
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+ { PCI_VENDOR_ID_OXSEMI, 0xc41f, /* OXPCIe200 1 Native UART */
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+ PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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+ pbn_oxsemi_1_4000000 },
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+ { PCI_VENDOR_ID_OXSEMI, 0xc42b, /* OXPCIe200 1 Native UART */
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+ PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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+ pbn_oxsemi_1_4000000 },
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+ { PCI_VENDOR_ID_OXSEMI, 0xc42f, /* OXPCIe200 1 Native UART */
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+ PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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+ pbn_oxsemi_1_4000000 },
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+ { PCI_VENDOR_ID_OXSEMI, 0xc43b, /* OXPCIe200 1 Native UART */
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+ PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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+ pbn_oxsemi_1_4000000 },
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+ { PCI_VENDOR_ID_OXSEMI, 0xc43f, /* OXPCIe200 1 Native UART */
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+ PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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+ pbn_oxsemi_1_4000000 },
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+ { PCI_VENDOR_ID_OXSEMI, 0xc44b, /* OXPCIe200 1 Native UART */
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+ PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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+ pbn_oxsemi_1_4000000 },
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+ { PCI_VENDOR_ID_OXSEMI, 0xc44f, /* OXPCIe200 1 Native UART */
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+ PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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+ pbn_oxsemi_1_4000000 },
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+ { PCI_VENDOR_ID_OXSEMI, 0xc45b, /* OXPCIe200 1 Native UART */
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+ PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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+ pbn_oxsemi_1_4000000 },
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+ { PCI_VENDOR_ID_OXSEMI, 0xc45f, /* OXPCIe200 1 Native UART */
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+ PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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+ pbn_oxsemi_1_4000000 },
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+ { PCI_VENDOR_ID_OXSEMI, 0xc46b, /* OXPCIe200 1 Native UART */
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+ PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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+ pbn_oxsemi_1_4000000 },
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+ { PCI_VENDOR_ID_OXSEMI, 0xc46f, /* OXPCIe200 1 Native UART */
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+ PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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+ pbn_oxsemi_1_4000000 },
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+ { PCI_VENDOR_ID_OXSEMI, 0xc47b, /* OXPCIe200 1 Native UART */
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+ PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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+ pbn_oxsemi_1_4000000 },
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+ { PCI_VENDOR_ID_OXSEMI, 0xc47f, /* OXPCIe200 1 Native UART */
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+ PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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+ pbn_oxsemi_1_4000000 },
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+ { PCI_VENDOR_ID_OXSEMI, 0xc48b, /* OXPCIe200 1 Native UART */
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+ PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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+ pbn_oxsemi_1_4000000 },
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+ { PCI_VENDOR_ID_OXSEMI, 0xc48f, /* OXPCIe200 1 Native UART */
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+ PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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+ pbn_oxsemi_1_4000000 },
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+ { PCI_VENDOR_ID_OXSEMI, 0xc49b, /* OXPCIe200 1 Native UART */
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+ PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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+ pbn_oxsemi_1_4000000 },
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+ { PCI_VENDOR_ID_OXSEMI, 0xc49f, /* OXPCIe200 1 Native UART */
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+ PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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+ pbn_oxsemi_1_4000000 },
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+ { PCI_VENDOR_ID_OXSEMI, 0xc4ab, /* OXPCIe200 1 Native UART */
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+ PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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+ pbn_oxsemi_1_4000000 },
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+ { PCI_VENDOR_ID_OXSEMI, 0xc4af, /* OXPCIe200 1 Native UART */
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+ PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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+ pbn_oxsemi_1_4000000 },
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+ { PCI_VENDOR_ID_OXSEMI, 0xc4bb, /* OXPCIe200 1 Native UART */
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+ PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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+ pbn_oxsemi_1_4000000 },
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+ { PCI_VENDOR_ID_OXSEMI, 0xc4bf, /* OXPCIe200 1 Native UART */
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+ PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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+ pbn_oxsemi_1_4000000 },
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+ { PCI_VENDOR_ID_OXSEMI, 0xc4cb, /* OXPCIe200 1 Native UART */
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+ PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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+ pbn_oxsemi_1_4000000 },
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+ { PCI_VENDOR_ID_OXSEMI, 0xc4cf, /* OXPCIe200 1 Native UART */
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+ PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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+ pbn_oxsemi_1_4000000 },
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+
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/*
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* SBS Technologies, Inc. P-Octal and PMC-OCTPRO cards,
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* from skokodyn@yahoo.com
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