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@@ -20,9 +20,11 @@
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#include <linux/mtd/nand.h>
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#include <linux/mtd/partitions.h>
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+#include <linux/gpio.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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+#include <asm/mach-types.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/pxa-regs.h>
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@@ -30,20 +32,6 @@
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#define GPIO_NAND_CS (11)
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#define GPIO_NAND_RB (89)
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-/* This macro needed to ensure in-order operation of GPIO and local
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- * bus. Without both asm command and dummy uncached read there're
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- * states when NAND access is broken. I've looked for such macro(s) in
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- * include/asm-arm but found nothing approptiate.
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- * dmac_clean_range is close, but is makes cache invalidation
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- * unnecessary here and it cannot be used in module
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- */
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-#define DRAIN_WB() \
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- do { \
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- unsigned char dummy; \
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- asm volatile ("mcr p15, 0, r0, c7, c10, 4":::"r0"); \
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- dummy=*((unsigned char*)UNCACHED_ADDR); \
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- } while(0)
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-
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/* MTD structure for CM-X270 board */
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static struct mtd_info *cmx270_nand_mtd;
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@@ -103,14 +91,14 @@ static int cmx270_verify_buf(struct mtd_info *mtd, const u_char *buf, int len)
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static inline void nand_cs_on(void)
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{
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- GPCR(GPIO_NAND_CS) = GPIO_bit(GPIO_NAND_CS);
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+ gpio_set_value(GPIO_NAND_CS, 0);
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}
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static void nand_cs_off(void)
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{
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- DRAIN_WB();
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+ dsb();
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- GPSR(GPIO_NAND_CS) = GPIO_bit(GPIO_NAND_CS);
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+ gpio_set_value(GPIO_NAND_CS, 1);
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}
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/*
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@@ -122,7 +110,7 @@ static void cmx270_hwcontrol(struct mtd_info *mtd, int dat,
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struct nand_chip* this = mtd->priv;
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unsigned int nandaddr = (unsigned int)this->IO_ADDR_W;
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- DRAIN_WB();
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+ dsb();
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if (ctrl & NAND_CTRL_CHANGE) {
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if ( ctrl & NAND_ALE )
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@@ -139,12 +127,12 @@ static void cmx270_hwcontrol(struct mtd_info *mtd, int dat,
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nand_cs_off();
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}
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- DRAIN_WB();
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+ dsb();
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this->IO_ADDR_W = (void __iomem*)nandaddr;
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if (dat != NAND_CMD_NONE)
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writel((dat << 16), this->IO_ADDR_W);
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- DRAIN_WB();
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+ dsb();
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}
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/*
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@@ -152,9 +140,9 @@ static void cmx270_hwcontrol(struct mtd_info *mtd, int dat,
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*/
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static int cmx270_device_ready(struct mtd_info *mtd)
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{
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- DRAIN_WB();
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+ dsb();
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- return (GPLR(GPIO_NAND_RB) & GPIO_bit(GPIO_NAND_RB));
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+ return (gpio_get_value(GPIO_NAND_RB));
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}
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/*
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@@ -168,20 +156,40 @@ static int cmx270_init(void)
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int mtd_parts_nb = 0;
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int ret;
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+ if (!machine_is_armcore())
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+ return -ENODEV;
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+
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+ ret = gpio_request(GPIO_NAND_CS, "NAND CS");
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+ if (ret) {
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+ pr_warning("CM-X270: failed to request NAND CS gpio\n");
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+ return ret;
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+ }
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+
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+ gpio_direction_output(GPIO_NAND_CS, 1);
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+
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+ ret = gpio_request(GPIO_NAND_RB, "NAND R/B");
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+ if (ret) {
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+ pr_warning("CM-X270: failed to request NAND R/B gpio\n");
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+ goto err_gpio_request;
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+ }
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+
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+ gpio_direction_input(GPIO_NAND_RB);
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+
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/* Allocate memory for MTD device structure and private data */
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cmx270_nand_mtd = kzalloc(sizeof(struct mtd_info) +
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sizeof(struct nand_chip),
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GFP_KERNEL);
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if (!cmx270_nand_mtd) {
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- printk("Unable to allocate CM-X270 NAND MTD device structure.\n");
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- return -ENOMEM;
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+ pr_debug("Unable to allocate CM-X270 NAND MTD device structure.\n");
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+ ret = -ENOMEM;
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+ goto err_kzalloc;
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}
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cmx270_nand_io = ioremap(PXA_CS1_PHYS, 12);
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if (!cmx270_nand_io) {
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- printk("Unable to ioremap NAND device\n");
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+ pr_debug("Unable to ioremap NAND device\n");
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ret = -EINVAL;
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- goto err1;
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+ goto err_ioremap;
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}
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/* Get pointer to private data */
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@@ -209,9 +217,9 @@ static int cmx270_init(void)
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/* Scan to find existence of the device */
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if (nand_scan (cmx270_nand_mtd, 1)) {
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- printk(KERN_NOTICE "No NAND device\n");
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+ pr_notice("No NAND device\n");
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ret = -ENXIO;
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- goto err2;
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+ goto err_scan;
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}
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#ifdef CONFIG_MTD_CMDLINE_PARTS
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@@ -229,18 +237,22 @@ static int cmx270_init(void)
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}
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/* Register the partitions */
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- printk(KERN_NOTICE "Using %s partition definition\n", part_type);
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+ pr_notice("Using %s partition definition\n", part_type);
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ret = add_mtd_partitions(cmx270_nand_mtd, mtd_parts, mtd_parts_nb);
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if (ret)
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- goto err2;
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+ goto err_scan;
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/* Return happy */
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return 0;
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-err2:
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+err_scan:
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iounmap(cmx270_nand_io);
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-err1:
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+err_ioremap:
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kfree(cmx270_nand_mtd);
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+err_kzalloc:
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+ gpio_free(GPIO_NAND_RB);
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+err_gpio_request:
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+ gpio_free(GPIO_NAND_CS);
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return ret;
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@@ -255,6 +267,9 @@ static void cmx270_cleanup(void)
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/* Release resources, unregister device */
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nand_release(cmx270_nand_mtd);
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+ gpio_free(GPIO_NAND_RB);
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+ gpio_free(GPIO_NAND_CS);
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+
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iounmap(cmx270_nand_io);
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/* Free the MTD device structure */
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