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@@ -485,7 +485,7 @@ out:
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static s32 e1000_init_phy_params_pchlan(struct e1000_hw *hw)
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{
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struct e1000_phy_info *phy = &hw->phy;
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- s32 ret_val = 0;
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+ s32 ret_val;
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phy->addr = 1;
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phy->reset_delay_us = 100;
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@@ -783,7 +783,7 @@ static s32 e1000_init_mac_params_ich8lan(struct e1000_hw *hw)
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static s32 __e1000_access_emi_reg_locked(struct e1000_hw *hw, u16 address,
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u16 *data, bool read)
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{
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- s32 ret_val = 0;
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+ s32 ret_val;
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ret_val = e1e_wphy_locked(hw, I82579_EMI_ADDR, address);
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if (ret_val)
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@@ -1387,7 +1387,7 @@ static s32 e1000_write_smbus_addr(struct e1000_hw *hw)
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u32 strap = er32(STRAP);
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u32 freq = (strap & E1000_STRAP_SMT_FREQ_MASK) >>
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E1000_STRAP_SMT_FREQ_SHIFT;
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- s32 ret_val = 0;
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+ s32 ret_val;
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strap &= E1000_STRAP_SMBUS_ADDRESS_MASK;
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@@ -1623,7 +1623,7 @@ release:
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**/
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s32 e1000_configure_k1_ich8lan(struct e1000_hw *hw, bool k1_enable)
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{
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- s32 ret_val = 0;
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+ s32 ret_val;
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u32 ctrl_reg = 0;
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u32 ctrl_ext = 0;
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u32 reg = 0;
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@@ -2284,7 +2284,7 @@ static s32 e1000_phy_hw_reset_ich8lan(struct e1000_hw *hw)
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**/
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static s32 e1000_set_lplu_state_pchlan(struct e1000_hw *hw, bool active)
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{
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- s32 ret_val = 0;
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+ s32 ret_val;
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u16 oem_reg;
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ret_val = e1e_rphy(hw, HV_OEM_BITS, &oem_reg);
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