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@@ -1,10 +1,11 @@
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/*
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* Atheros AR71XX/AR724X/AR913X SoC register definitions
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*
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+ * Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com>
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* Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
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*
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- * Parts of this file are based on Atheros' 2.6.15 BSP
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+ * Parts of this file are based on Atheros' 2.6.15/2.6.31 BSP
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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@@ -249,6 +250,9 @@
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#define REV_ID_MAJOR_AR7242 0x1100
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#define REV_ID_MAJOR_AR9330 0x0110
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#define REV_ID_MAJOR_AR9331 0x1110
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+#define REV_ID_MAJOR_AR9341 0x0120
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+#define REV_ID_MAJOR_AR9342 0x1120
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+#define REV_ID_MAJOR_AR9344 0x2120
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#define AR71XX_REV_ID_MINOR_MASK 0x3
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#define AR71XX_REV_ID_MINOR_AR7130 0x0
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