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@@ -157,12 +157,17 @@ static struct clk ck_dpll1 = {
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.parent = &ck_ref,
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};
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+/*
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+ * FIXME: This clock seems to be necessary but no-one has asked for its
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+ * activation. [ FIX: SoSSI, SSR ]
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+ */
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static struct arm_idlect1_clk ck_dpll1out = {
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.clk = {
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.name = "ck_dpll1out",
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.ops = &clkops_generic,
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.parent = &ck_dpll1,
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- .flags = CLOCK_IDLE_CONTROL | ENABLE_REG_32BIT,
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+ .flags = CLOCK_IDLE_CONTROL | ENABLE_REG_32BIT |
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+ ENABLE_ON_INIT,
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.enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
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.enable_bit = EN_CKOUT_ARM,
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.recalc = &followparent_recalc,
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@@ -207,10 +212,15 @@ static struct arm_idlect1_clk armper_ck = {
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.idlect_shift = 2,
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};
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+/*
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+ * FIXME: This clock seems to be necessary but no-one has asked for its
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+ * activation. [ GPIO code for 1510 ]
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+ */
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static struct clk arm_gpio_ck = {
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.name = "arm_gpio_ck",
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.ops = &clkops_generic,
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.parent = &ck_dpll1,
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+ .flags = ENABLE_ON_INIT,
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.enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
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.enable_bit = EN_GPIOCK,
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.recalc = &followparent_recalc,
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@@ -372,10 +382,15 @@ static struct clk tc1_ck = {
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.recalc = &followparent_recalc,
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};
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+/*
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+ * FIXME: This clock seems to be necessary but no-one has asked for its
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+ * activation. [ pm.c (SRAM), CCP, Camera ]
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+ */
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static struct clk tc2_ck = {
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.name = "tc2_ck",
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.ops = &clkops_generic,
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.parent = &tc_ck.clk,
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+ .flags = ENABLE_ON_INIT,
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.enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT3),
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.enable_bit = EN_TC2_CK,
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.recalc = &followparent_recalc,
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