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@@ -154,6 +154,8 @@
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#define WBCIR_CNTR_R 0x02
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/* Invert TX */
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#define WBCIR_IRTX_INV 0x04
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+/* Receiver oversampling */
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+#define WBCIR_RX_T_OV 0x40
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/* Valid banks for the SP3 UART */
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enum wbcir_bank {
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@@ -394,7 +396,8 @@ wbcir_irq_rx(struct wbcir_data *data, struct pnp_dev *device)
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if (data->rxstate == WBCIR_RXSTATE_ERROR)
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continue;
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- duration = ((irdata & 0x7F) + 1) * 2;
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+ duration = ((irdata & 0x7F) + 1) *
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+ (data->carrier_report_enabled ? 2 : 10);
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rawir.pulse = irdata & 0x80 ? false : true;
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rawir.duration = US_TO_NS(duration);
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@@ -550,6 +553,17 @@ wbcir_set_carrier_report(struct rc_dev *dev, int enable)
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wbcir_set_bits(data->ebase + WBCIR_REG_ECEIR_CCTL,
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WBCIR_CNTR_EN, WBCIR_CNTR_EN | WBCIR_CNTR_R);
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+ /* Set a higher sampling resolution if carrier reports are enabled */
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+ wbcir_select_bank(data, WBCIR_BANK_2);
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+ data->dev->rx_resolution = US_TO_NS(enable ? 2 : 10);
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+ outb(enable ? 0x03 : 0x0f, data->sbase + WBCIR_REG_SP3_BGDL);
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+ outb(0x00, data->sbase + WBCIR_REG_SP3_BGDH);
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+
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+ /* Enable oversampling if carrier reports are enabled */
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+ wbcir_select_bank(data, WBCIR_BANK_7);
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+ wbcir_set_bits(data->sbase + WBCIR_REG_SP3_RCCFG,
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+ enable ? WBCIR_RX_T_OV : 0, WBCIR_RX_T_OV);
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+
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data->carrier_report_enabled = enable;
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spin_unlock_irqrestore(&data->spinlock, flags);
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@@ -931,8 +945,8 @@ wbcir_init_hw(struct wbcir_data *data)
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/* prescaler 1.0, tx/rx fifo lvl 16 */
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outb(0x30, data->sbase + WBCIR_REG_SP3_EXCR2);
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- /* Set baud divisor to sample every 2 ns */
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- outb(0x03, data->sbase + WBCIR_REG_SP3_BGDL);
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+ /* Set baud divisor to sample every 10 us */
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+ outb(0x0f, data->sbase + WBCIR_REG_SP3_BGDL);
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outb(0x00, data->sbase + WBCIR_REG_SP3_BGDH);
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/* Set CEIR mode */
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@@ -941,12 +955,9 @@ wbcir_init_hw(struct wbcir_data *data)
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inb(data->sbase + WBCIR_REG_SP3_LSR); /* Clear LSR */
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inb(data->sbase + WBCIR_REG_SP3_MSR); /* Clear MSR */
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- /*
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- * Disable RX demod, enable run-length enc/dec, set freq span and
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- * enable over-sampling
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- */
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+ /* Disable RX demod, enable run-length enc/dec, set freq span */
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wbcir_select_bank(data, WBCIR_BANK_7);
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- outb(0xd0, data->sbase + WBCIR_REG_SP3_RCCFG);
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+ outb(0x90, data->sbase + WBCIR_REG_SP3_RCCFG);
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/* Disable timer */
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wbcir_select_bank(data, WBCIR_BANK_4);
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