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@@ -40,46 +40,46 @@ unsigned int nr_irq;
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#define MER_ME (1<<0)
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#define MER_HIE (1<<1)
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-static void intc_enable_or_unmask(unsigned int irq)
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+static void intc_enable_or_unmask(struct irq_data *d)
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{
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- unsigned long mask = 1 << irq;
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- pr_debug("enable_or_unmask: %d\n", irq);
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+ unsigned long mask = 1 << d->irq;
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+ pr_debug("enable_or_unmask: %d\n", d->irq);
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out_be32(INTC_BASE + SIE, mask);
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/* ack level irqs because they can't be acked during
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* ack function since the handle_level_irq function
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* acks the irq before calling the interrupt handler
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*/
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- if (irq_desc[irq].status & IRQ_LEVEL)
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+ if (irq_to_desc(d->irq)->status & IRQ_LEVEL)
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out_be32(INTC_BASE + IAR, mask);
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}
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-static void intc_disable_or_mask(unsigned int irq)
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+static void intc_disable_or_mask(struct irq_data *d)
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{
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- pr_debug("disable: %d\n", irq);
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- out_be32(INTC_BASE + CIE, 1 << irq);
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+ pr_debug("disable: %d\n", d->irq);
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+ out_be32(INTC_BASE + CIE, 1 << d->irq);
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}
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-static void intc_ack(unsigned int irq)
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+static void intc_ack(struct irq_data *d)
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{
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- pr_debug("ack: %d\n", irq);
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- out_be32(INTC_BASE + IAR, 1 << irq);
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+ pr_debug("ack: %d\n", d->irq);
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+ out_be32(INTC_BASE + IAR, 1 << d->irq);
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}
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-static void intc_mask_ack(unsigned int irq)
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+static void intc_mask_ack(struct irq_data *d)
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{
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- unsigned long mask = 1 << irq;
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- pr_debug("disable_and_ack: %d\n", irq);
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+ unsigned long mask = 1 << d->irq;
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+ pr_debug("disable_and_ack: %d\n", d->irq);
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out_be32(INTC_BASE + CIE, mask);
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out_be32(INTC_BASE + IAR, mask);
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}
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static struct irq_chip intc_dev = {
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.name = "Xilinx INTC",
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- .unmask = intc_enable_or_unmask,
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- .mask = intc_disable_or_mask,
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- .ack = intc_ack,
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- .mask_ack = intc_mask_ack,
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+ .irq_unmask = intc_enable_or_unmask,
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+ .irq_mask = intc_disable_or_mask,
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+ .irq_ack = intc_ack,
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+ .irq_mask_ack = intc_mask_ack,
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};
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unsigned int get_irq(struct pt_regs *regs)
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@@ -159,11 +159,11 @@ void __init init_IRQ(void)
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if (intr_type & (0x00000001 << i)) {
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set_irq_chip_and_handler_name(i, &intc_dev,
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handle_edge_irq, intc_dev.name);
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- irq_desc[i].status &= ~IRQ_LEVEL;
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+ irq_clear_status_flags(i, IRQ_LEVEL);
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} else {
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set_irq_chip_and_handler_name(i, &intc_dev,
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handle_level_irq, intc_dev.name);
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- irq_desc[i].status |= IRQ_LEVEL;
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+ irq_set_status_flags(i, IRQ_LEVEL);
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}
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}
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}
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