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@@ -169,6 +169,38 @@ static struct cpuidle_state snb_cstates[MWAIT_MAX_NUM_CSTATES] = {
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.enter = &intel_idle },
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};
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+static struct cpuidle_state ivb_cstates[MWAIT_MAX_NUM_CSTATES] = {
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+ { /* MWAIT C0 */ },
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+ { /* MWAIT C1 */
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+ .name = "C1-IVB",
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+ .desc = "MWAIT 0x00",
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+ .flags = CPUIDLE_FLAG_TIME_VALID,
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+ .exit_latency = 1,
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+ .target_residency = 1,
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+ .enter = &intel_idle },
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+ { /* MWAIT C2 */
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+ .name = "C3-IVB",
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+ .desc = "MWAIT 0x10",
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+ .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
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+ .exit_latency = 59,
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+ .target_residency = 156,
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+ .enter = &intel_idle },
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+ { /* MWAIT C3 */
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+ .name = "C6-IVB",
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+ .desc = "MWAIT 0x20",
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+ .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
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+ .exit_latency = 80,
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+ .target_residency = 300,
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+ .enter = &intel_idle },
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+ { /* MWAIT C4 */
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+ .name = "C7-IVB",
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+ .desc = "MWAIT 0x30",
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+ .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
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+ .exit_latency = 87,
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+ .target_residency = 300,
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+ .enter = &intel_idle },
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+};
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+
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static struct cpuidle_state atom_cstates[MWAIT_MAX_NUM_CSTATES] = {
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{ /* MWAIT C0 */ },
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{ /* MWAIT C1 */
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@@ -347,6 +379,10 @@ static const struct idle_cpu idle_cpu_snb = {
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.state_table = snb_cstates,
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};
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+static const struct idle_cpu idle_cpu_ivb = {
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+ .state_table = ivb_cstates,
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+};
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+
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#define ICPU(model, cpu) \
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{ X86_VENDOR_INTEL, 6, model, X86_FEATURE_MWAIT, (unsigned long)&cpu }
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@@ -362,6 +398,7 @@ static const struct x86_cpu_id intel_idle_ids[] = {
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ICPU(0x2f, idle_cpu_nehalem),
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ICPU(0x2a, idle_cpu_snb),
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ICPU(0x2d, idle_cpu_snb),
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+ ICPU(0x3a, idle_cpu_ivb),
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{}
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};
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MODULE_DEVICE_TABLE(x86cpu, intel_idle_ids);
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