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@@ -26,11 +26,13 @@
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#include <mach/bcm2835_soc.h>
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#define PM_RSTC 0x1c
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+#define PM_RSTS 0x20
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#define PM_WDOG 0x24
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#define PM_PASSWORD 0x5a000000
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#define PM_RSTC_WRCFG_MASK 0x00000030
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#define PM_RSTC_WRCFG_FULL_RESET 0x00000020
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+#define PM_RSTS_HADWRH_SET 0x00000040
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static void __iomem *wdt_regs;
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@@ -67,6 +69,29 @@ static void bcm2835_restart(char mode, const char *cmd)
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mdelay(1);
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}
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+/*
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+ * We can't really power off, but if we do the normal reset scheme, and
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+ * indicate to bootcode.bin not to reboot, then most of the chip will be
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+ * powered off.
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+ */
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+static void bcm2835_power_off(void)
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+{
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+ u32 val;
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+
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+ /*
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+ * We set the watchdog hard reset bit here to distinguish this reset
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+ * from the normal (full) reset. bootcode.bin will not reboot after a
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+ * hard reset.
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+ */
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+ val = readl_relaxed(wdt_regs + PM_RSTS);
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+ val &= ~PM_RSTC_WRCFG_MASK;
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+ val |= PM_PASSWORD | PM_RSTS_HADWRH_SET;
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+ writel_relaxed(val, wdt_regs + PM_RSTS);
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+
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+ /* Continue with normal reset mechanism */
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+ bcm2835_restart(0, "");
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+}
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+
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static struct map_desc io_map __initdata = {
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.virtual = BCM2835_PERIPH_VIRT,
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.pfn = __phys_to_pfn(BCM2835_PERIPH_PHYS),
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@@ -84,6 +109,9 @@ static void __init bcm2835_init(void)
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int ret;
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bcm2835_setup_restart();
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+ if (wdt_regs)
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+ pm_power_off = bcm2835_power_off;
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+
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bcm2835_init_clocks();
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ret = of_platform_populate(NULL, of_default_bus_match_table, NULL,
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