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@@ -3127,7 +3127,7 @@ union voltage_object {
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static ATOM_VOLTAGE_OBJECT *atom_lookup_voltage_object_v1(ATOM_VOLTAGE_OBJECT_INFO *v1,
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u8 voltage_type)
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{
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- u32 size = v1->sHeader.usStructureSize;
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+ u32 size = le16_to_cpu(v1->sHeader.usStructureSize);
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u32 offset = offsetof(ATOM_VOLTAGE_OBJECT_INFO, asVoltageObj[0]);
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u8 *start = (u8 *)v1;
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@@ -3144,7 +3144,7 @@ static ATOM_VOLTAGE_OBJECT *atom_lookup_voltage_object_v1(ATOM_VOLTAGE_OBJECT_IN
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static ATOM_VOLTAGE_OBJECT_V2 *atom_lookup_voltage_object_v2(ATOM_VOLTAGE_OBJECT_INFO_V2 *v2,
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u8 voltage_type)
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{
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- u32 size = v2->sHeader.usStructureSize;
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+ u32 size = le16_to_cpu(v2->sHeader.usStructureSize);
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u32 offset = offsetof(ATOM_VOLTAGE_OBJECT_INFO_V2, asVoltageObj[0]);
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u8 *start = (u8*)v2;
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@@ -3161,7 +3161,7 @@ static ATOM_VOLTAGE_OBJECT_V2 *atom_lookup_voltage_object_v2(ATOM_VOLTAGE_OBJECT
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static ATOM_VOLTAGE_OBJECT_V3 *atom_lookup_voltage_object_v3(ATOM_VOLTAGE_OBJECT_INFO_V3_1 *v3,
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u8 voltage_type, u8 voltage_mode)
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{
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- u32 size = v3->sHeader.usStructureSize;
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+ u32 size = le16_to_cpu(v3->sHeader.usStructureSize);
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u32 offset = offsetof(ATOM_VOLTAGE_OBJECT_INFO_V3_1, asVoltageObj[0]);
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u8 *start = (u8*)v3;
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@@ -3170,7 +3170,7 @@ static ATOM_VOLTAGE_OBJECT_V3 *atom_lookup_voltage_object_v3(ATOM_VOLTAGE_OBJECT
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if ((vo->asGpioVoltageObj.sHeader.ucVoltageType == voltage_type) &&
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(vo->asGpioVoltageObj.sHeader.ucVoltageMode == voltage_mode))
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return vo;
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- offset += vo->asGpioVoltageObj.sHeader.usSize;
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+ offset += le16_to_cpu(vo->asGpioVoltageObj.sHeader.usSize);
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}
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return NULL;
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}
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@@ -3708,7 +3708,7 @@ int radeon_atom_init_mc_reg_table(struct radeon_device *rdev,
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while (!(reg_block->asRegIndexBuf[i].ucPreRegDataLength & ACCESS_PLACEHOLDER) &&
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(i < num_entries)) {
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reg_table->mc_reg_address[i].s1 =
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- (u16)(reg_block->asRegIndexBuf[i].usRegIndex);
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+ (u16)(le16_to_cpu(reg_block->asRegIndexBuf[i].usRegIndex));
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reg_table->mc_reg_address[i].pre_reg_data =
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(u8)(reg_block->asRegIndexBuf[i].ucPreRegDataLength);
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i++;
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