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@@ -65,6 +65,7 @@
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#define BitOp (1<<8)
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#define MemAbs (1<<9) /* Memory operand is absolute displacement */
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#define String (1<<10) /* String instruction (rep capable) */
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+#define Stack (1<<11) /* Stack instruction (push/pop) */
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static u16 opcode_table[256] = {
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/* 0x00 - 0x07 */
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@@ -104,14 +105,16 @@ static u16 opcode_table[256] = {
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/* 0x48 - 0x4F */
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DstReg, DstReg, DstReg, DstReg, DstReg, DstReg, DstReg, DstReg,
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/* 0x50 - 0x57 */
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- SrcReg, SrcReg, SrcReg, SrcReg, SrcReg, SrcReg, SrcReg, SrcReg,
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+ SrcReg | Stack, SrcReg | Stack, SrcReg | Stack, SrcReg | Stack,
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+ SrcReg | Stack, SrcReg | Stack, SrcReg | Stack, SrcReg | Stack,
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/* 0x58 - 0x5F */
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- DstReg, DstReg, DstReg, DstReg, DstReg, DstReg, DstReg, DstReg,
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+ DstReg | Stack, DstReg | Stack, DstReg | Stack, DstReg | Stack,
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+ DstReg | Stack, DstReg | Stack, DstReg | Stack, DstReg | Stack,
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/* 0x60 - 0x67 */
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0, 0, 0, DstReg | SrcMem32 | ModRM | Mov /* movsxd (x86/64) */ ,
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0, 0, 0, 0,
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/* 0x68 - 0x6F */
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- 0, 0, ImplicitOps|Mov, 0,
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+ 0, 0, ImplicitOps | Mov | Stack, 0,
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SrcNone | ByteOp | ImplicitOps, SrcNone | ImplicitOps, /* insb, insw/insd */
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SrcNone | ByteOp | ImplicitOps, SrcNone | ImplicitOps, /* outsb, outsw/outsd */
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/* 0x70 - 0x77 */
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@@ -128,9 +131,10 @@ static u16 opcode_table[256] = {
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/* 0x88 - 0x8F */
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ByteOp | DstMem | SrcReg | ModRM | Mov, DstMem | SrcReg | ModRM | Mov,
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ByteOp | DstReg | SrcMem | ModRM | Mov, DstReg | SrcMem | ModRM | Mov,
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- 0, ModRM | DstReg, 0, DstMem | SrcNone | ModRM | Mov,
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+ 0, ModRM | DstReg, 0, DstMem | SrcNone | ModRM | Mov | Stack,
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/* 0x90 - 0x9F */
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- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ImplicitOps, ImplicitOps, 0, 0,
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+ 0, 0, 0, 0, 0, 0, 0, 0,
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+ 0, 0, 0, 0, ImplicitOps | Stack, ImplicitOps | Stack, 0, 0,
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/* 0xA0 - 0xA7 */
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ByteOp | DstReg | SrcMem | Mov | MemAbs, DstReg | SrcMem | Mov | MemAbs,
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ByteOp | DstMem | SrcReg | Mov | MemAbs, DstMem | SrcReg | Mov | MemAbs,
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@@ -144,7 +148,7 @@ static u16 opcode_table[256] = {
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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/* 0xC0 - 0xC7 */
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ByteOp | DstMem | SrcImm | ModRM, DstMem | SrcImmByte | ModRM,
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- 0, ImplicitOps, 0, 0,
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+ 0, ImplicitOps | Stack, 0, 0,
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ByteOp | DstMem | SrcImm | ModRM | Mov, DstMem | SrcImm | ModRM | Mov,
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/* 0xC8 - 0xCF */
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0, 0, 0, 0, 0, 0, 0, 0,
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@@ -157,7 +161,8 @@ static u16 opcode_table[256] = {
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/* 0xE0 - 0xE7 */
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0, 0, 0, 0, 0, 0, 0, 0,
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/* 0xE8 - 0xEF */
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- ImplicitOps, SrcImm|ImplicitOps, 0, SrcImmByte|ImplicitOps, 0, 0, 0, 0,
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+ ImplicitOps | Stack, SrcImm|ImplicitOps, 0, SrcImmByte|ImplicitOps,
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+ 0, 0, 0, 0,
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/* 0xF0 - 0xF7 */
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0, 0, 0, 0,
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ImplicitOps, ImplicitOps,
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@@ -868,6 +873,9 @@ done_prefixes:
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}
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}
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+ if (mode == X86EMUL_MODE_PROT64 && (c->d & Stack))
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+ c->op_bytes = 8;
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+
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/* ModRM and SIB bytes. */
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if (c->d & ModRM)
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rc = decode_modrm(ctxt, ops);
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@@ -988,11 +996,6 @@ static inline int emulate_grp1a(struct x86_emulate_ctxt *ctxt,
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struct decode_cache *c = &ctxt->decode;
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int rc;
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- /* 64-bit mode: POP always pops a 64-bit operand. */
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-
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- if (ctxt->mode == X86EMUL_MODE_PROT64)
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- c->dst.bytes = 8;
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-
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rc = ops->read_std(register_address(ctxt->ss_base,
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c->regs[VCPU_REGS_RSP]),
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&c->dst.val, c->dst.bytes, ctxt->vcpu);
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