|
@@ -98,3 +98,26 @@ drm_clflush_pages(struct page *pages[], unsigned long num_pages)
|
|
|
#endif
|
|
|
}
|
|
|
EXPORT_SYMBOL(drm_clflush_pages);
|
|
|
+
|
|
|
+void
|
|
|
+drm_clflush_virt_range(char *addr, unsigned long length)
|
|
|
+{
|
|
|
+#if defined(CONFIG_X86)
|
|
|
+ if (cpu_has_clflush) {
|
|
|
+ char *end = addr + length;
|
|
|
+ mb();
|
|
|
+ for (; addr < end; addr += boot_cpu_data.x86_clflush_size)
|
|
|
+ clflush(addr);
|
|
|
+ clflush(end - 1);
|
|
|
+ mb();
|
|
|
+ return;
|
|
|
+ }
|
|
|
+
|
|
|
+ if (on_each_cpu(drm_clflush_ipi_handler, NULL, 1) != 0)
|
|
|
+ printk(KERN_ERR "Timed out waiting for cache flush.\n");
|
|
|
+#else
|
|
|
+ printk(KERN_ERR "Architecture has no drm_cache.c support\n");
|
|
|
+ WARN_ON_ONCE(1);
|
|
|
+#endif
|
|
|
+}
|
|
|
+EXPORT_SYMBOL(drm_clflush_virt_range);
|