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@@ -1690,6 +1690,8 @@ int dsi_pll_set_clock_div(struct platform_device *dsidev,
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l = FLD_MOD(l, 1, 13, 13); /* DSI_PLL_REFEN */
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l = FLD_MOD(l, 0, 14, 14); /* DSIPHY_CLKINEN */
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l = FLD_MOD(l, 1, 20, 20); /* DSI_HSDIVBYPASS */
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+ if (dss_has_feature(FEAT_DSI_PLL_REFSEL))
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+ l = FLD_MOD(l, 3, 22, 21); /* REF_SYSCLK = sysclk */
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dsi_write_reg(dsidev, DSI_PLL_CONFIGURATION2, l);
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REG_FLD_MOD(dsidev, DSI_PLL_GO, 1, 0, 0); /* DSI_PLL_GO */
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