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@@ -1,6 +1,6 @@
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/* pci_schizo.c: SCHIZO/TOMATILLO specific PCI controller support.
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*
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- * Copyright (C) 2001, 2002, 2003, 2007 David S. Miller (davem@davemloft.net)
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+ * Copyright (C) 2001, 2002, 2003, 2007, 2008 David S. Miller (davem@davemloft.net)
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*/
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#include <linux/kernel.h>
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@@ -13,14 +13,15 @@
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#include <asm/iommu.h>
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#include <asm/irq.h>
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-#include <asm/upa.h>
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#include <asm/pstate.h>
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#include <asm/prom.h>
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-#include <asm/oplib.h>
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#include "pci_impl.h"
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#include "iommu_common.h"
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+#define DRIVER_NAME "schizo"
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+#define PFX DRIVER_NAME ": "
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+
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/* All SCHIZO registers are 64-bits. The following accessor
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* routines are how they are accessed. The REG parameter
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* is a physical address.
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@@ -1084,7 +1085,7 @@ static void pbm_config_busmastering(struct pci_pbm_info *pbm)
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pci_config_write8(addr, 64);
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}
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-static void __init schizo_scan_bus(struct pci_pbm_info *pbm)
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+static void __devinit schizo_scan_bus(struct pci_pbm_info *pbm)
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{
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pbm_config_busmastering(pbm);
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pbm->is_66mhz_capable =
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@@ -1187,9 +1188,9 @@ static int schizo_pbm_iommu_init(struct pci_pbm_info *pbm)
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break;
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default:
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- prom_printf("SCHIZO: strange virtual-dma size.\n");
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- prom_halt();
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- };
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+ printk(KERN_ERR PFX "Strange virtual-dma size.\n");
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+ return -EINVAL;
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+ }
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/* Register addresses, SCHIZO has iommu ctx flushing. */
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iommu->iommu_control = pbm->pbm_regs + SCHIZO_IOMMU_CONTROL;
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@@ -1212,7 +1213,7 @@ static int schizo_pbm_iommu_init(struct pci_pbm_info *pbm)
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tagbase = SCHIZO_IOMMU_TAG, database = SCHIZO_IOMMU_DATA;
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- for(i = 0; i < 16; i++) {
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+ for (i = 0; i < 16; i++) {
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schizo_write(pbm->pbm_regs + tagbase + (i * 8UL), 0);
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schizo_write(pbm->pbm_regs + database + (i * 8UL), 0);
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}
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@@ -1222,8 +1223,10 @@ static int schizo_pbm_iommu_init(struct pci_pbm_info *pbm)
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*/
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err = iommu_table_init(iommu, tsbsize * 8 * 1024, vdma[0], dma_mask,
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pbm->numa_node);
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- if (err)
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+ if (err) {
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+ printk(KERN_ERR PFX "iommu_table_init() fails with %d\n", err);
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return err;
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+ }
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schizo_write(iommu->iommu_tsbbase, __pa(iommu->page_table));
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@@ -1236,7 +1239,7 @@ static int schizo_pbm_iommu_init(struct pci_pbm_info *pbm)
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case 128:
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control |= SCHIZO_IOMMU_TSBSZ_128K;
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break;
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- };
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+ }
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control |= SCHIZO_IOMMU_CTRL_ENAB;
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schizo_write(iommu->iommu_control, control);
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@@ -1334,9 +1337,9 @@ static void schizo_pbm_hw_init(struct pci_pbm_info *pbm)
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}
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}
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-static int __init schizo_pbm_init(struct pci_controller_info *p,
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- struct device_node *dp, u32 portid,
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- int chip_type)
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+static int __devinit schizo_pbm_init(struct pci_controller_info *p,
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+ struct device_node *dp, u32 portid,
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+ int chip_type)
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{
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const struct linux_prom64_registers *regs;
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struct pci_pbm_info *pbm;
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@@ -1382,7 +1385,6 @@ static int __init schizo_pbm_init(struct pci_controller_info *p,
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pbm->numa_node = -1;
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- pbm->scan_bus = schizo_scan_bus;
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pbm->pci_ops = &sun4u_pci_ops;
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pbm->config_space_reg_bits = 8;
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@@ -1420,6 +1422,8 @@ static int __init schizo_pbm_init(struct pci_controller_info *p,
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schizo_pbm_strbuf_init(pbm);
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+ schizo_scan_bus(pbm);
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+
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return 0;
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}
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@@ -1433,8 +1437,7 @@ static inline int portid_compare(u32 x, u32 y, int chip_type)
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return (x == y);
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}
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-static void __init __schizo_init(struct device_node *dp, char *model_name,
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- int chip_type)
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+static int __devinit __schizo_init(struct device_node *dp, unsigned long chip_type)
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{
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struct pci_controller_info *p;
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struct pci_pbm_info *pbm;
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@@ -1447,48 +1450,88 @@ static void __init __schizo_init(struct device_node *dp, char *model_name,
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if (portid_compare(pbm->portid, portid, chip_type)) {
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if (schizo_pbm_init(pbm->parent, dp,
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portid, chip_type))
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- goto fatal_memory_error;
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- return;
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+ return -ENOMEM;
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+ return 0;
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}
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}
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p = kzalloc(sizeof(struct pci_controller_info), GFP_ATOMIC);
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- if (!p)
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- goto fatal_memory_error;
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+ if (!p) {
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+ printk(KERN_ERR PFX "Cannot allocate controller info.\n");
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+ goto out_free;
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+ }
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iommu = kzalloc(sizeof(struct iommu), GFP_ATOMIC);
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- if (!iommu)
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- goto fatal_memory_error;
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+ if (!iommu) {
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+ printk(KERN_ERR PFX "Cannot allocate PBM A iommu.\n");
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+ goto out_free;
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+ }
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p->pbm_A.iommu = iommu;
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iommu = kzalloc(sizeof(struct iommu), GFP_ATOMIC);
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- if (!iommu)
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- goto fatal_memory_error;
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+ if (!iommu) {
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+ printk(KERN_ERR PFX "Cannot allocate PBM B iommu.\n");
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+ goto out_free;
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+ }
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p->pbm_B.iommu = iommu;
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if (schizo_pbm_init(p, dp, portid, chip_type))
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- goto fatal_memory_error;
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+ goto out_free;
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- return;
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+ return 0;
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-fatal_memory_error:
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- prom_printf("SCHIZO: Fatal memory allocation error.\n");
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- prom_halt();
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+out_free:
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+ if (p) {
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+ if (p->pbm_A.iommu)
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+ kfree(p->pbm_A.iommu);
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+ if (p->pbm_B.iommu)
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+ kfree(p->pbm_B.iommu);
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+ kfree(p);
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+ }
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+ return -ENOMEM;
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}
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-void __init schizo_init(struct device_node *dp, char *model_name)
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+static int __devinit schizo_probe(struct of_device *op,
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+ const struct of_device_id *match)
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{
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- __schizo_init(dp, model_name, PBM_CHIP_TYPE_SCHIZO);
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+ return __schizo_init(op->node, (unsigned long) match->data);
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}
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-void __init schizo_plus_init(struct device_node *dp, char *model_name)
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-{
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- __schizo_init(dp, model_name, PBM_CHIP_TYPE_SCHIZO_PLUS);
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-}
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+/* The ordering of this table is very important. Some Tomatillo
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+ * nodes announce that they are compatible with both pci108e,a801
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+ * and pci108e,8001. So list the chips in reverse chronological
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+ * order.
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+ */
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+static struct of_device_id schizo_match[] = {
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+ {
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+ .name = "pci",
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+ .compatible = "pci108e,a801",
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+ .data = (void *) PBM_CHIP_TYPE_TOMATILLO,
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+ },
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+ {
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+ .name = "pci",
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+ .compatible = "pci108e,8002",
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+ .data = (void *) PBM_CHIP_TYPE_SCHIZO_PLUS,
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+ },
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+ {
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+ .name = "pci",
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+ .compatible = "pci108e,8001",
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+ .data = (void *) PBM_CHIP_TYPE_SCHIZO,
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+ },
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+ {},
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+};
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-void __init tomatillo_init(struct device_node *dp, char *model_name)
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+static struct of_platform_driver schizo_driver = {
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+ .name = DRIVER_NAME,
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+ .match_table = schizo_match,
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+ .probe = schizo_probe,
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+};
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+
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+static int __init schizo_init(void)
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{
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- __schizo_init(dp, model_name, PBM_CHIP_TYPE_TOMATILLO);
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+ return of_register_driver(&schizo_driver, &of_bus_type);
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}
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+
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+subsys_initcall(schizo_init);
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