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@@ -68,12 +68,45 @@ static struct clksrc_clk clk_mout_mpll_user = {
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.reg_src = { .reg = EXYNOS4_CLKSRC_CPU, .shift = 24, .size = 1 },
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};
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+static struct clksrc_clk exynos4x12_clk_mout_g2d0 = {
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+ .clk = {
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+ .name = "mout_g2d0",
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+ },
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+ .sources = &exynos4_clkset_mout_g2d0,
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+ .reg_src = { .reg = EXYNOS4_CLKSRC_DMC, .shift = 20, .size = 1 },
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+};
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+
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+static struct clksrc_clk exynos4x12_clk_mout_g2d1 = {
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+ .clk = {
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+ .name = "mout_g2d1",
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+ },
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+ .sources = &exynos4_clkset_mout_g2d1,
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+ .reg_src = { .reg = EXYNOS4_CLKSRC_DMC, .shift = 24, .size = 1 },
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+};
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+
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+static struct clk *exynos4x12_clkset_mout_g2d_list[] = {
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+ [0] = &exynos4x12_clk_mout_g2d0.clk,
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+ [1] = &exynos4x12_clk_mout_g2d1.clk,
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+};
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+
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+static struct clksrc_sources exynos4x12_clkset_mout_g2d = {
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+ .sources = exynos4x12_clkset_mout_g2d_list,
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+ .nr_sources = ARRAY_SIZE(exynos4x12_clkset_mout_g2d_list),
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+};
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+
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static struct clksrc_clk *sysclks[] = {
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&clk_mout_mpll_user,
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};
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static struct clksrc_clk clksrcs[] = {
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- /* nothing here yet */
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+ {
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+ .clk = {
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+ .name = "sclk_fimg2d",
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+ },
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+ .sources = &exynos4x12_clkset_mout_g2d,
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+ .reg_src = { .reg = EXYNOS4_CLKSRC_DMC, .shift = 28, .size = 1 },
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+ .reg_div = { .reg = EXYNOS4_CLKDIV_DMC1, .shift = 0, .size = 4 },
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+ },
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};
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static struct clk init_clocks_off[] = {
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@@ -102,7 +135,11 @@ static struct clk init_clocks_off[] = {
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.devname = "exynos-fimc-lite.1",
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.enable = exynos4212_clk_ip_isp0_ctrl,
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.ctrlbit = (1 << 3),
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- }
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+ }, {
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+ .name = "fimg2d",
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+ .enable = exynos4_clk_ip_dmc_ctrl,
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+ .ctrlbit = (1 << 23),
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+ },
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};
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#ifdef CONFIG_PM_SLEEP
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