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@@ -112,6 +112,12 @@ static inline int last_trb(struct xhci_hcd *xhci, struct xhci_ring *ring,
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return (trb->link.control & TRB_TYPE_BITMASK) == TRB_TYPE(TRB_LINK);
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}
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+static inline int enqueue_is_link_trb(struct xhci_ring *ring)
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+{
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+ struct xhci_link_trb *link = &ring->enqueue->link;
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+ return ((link->control & TRB_TYPE_BITMASK) == TRB_TYPE(TRB_LINK));
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+}
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+
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/* Updates trb to point to the next TRB in the ring, and updates seg if the next
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* TRB is in a new segment. This does not skip over link TRBs, and it does not
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* effect the ring dequeue or enqueue pointers.
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@@ -193,20 +199,15 @@ static void inc_enq(struct xhci_hcd *xhci, struct xhci_ring *ring, bool consumer
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while (last_trb(xhci, ring, ring->enq_seg, next)) {
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if (!consumer) {
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if (ring != xhci->event_ring) {
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- /* If we're not dealing with 0.95 hardware,
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- * carry over the chain bit of the previous TRB
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- * (which may mean the chain bit is cleared).
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- */
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- if (!xhci_link_trb_quirk(xhci)) {
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- next->link.control &= ~TRB_CHAIN;
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- next->link.control |= chain;
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+ if (chain) {
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+ next->link.control |= TRB_CHAIN;
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+
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+ /* Give this link TRB to the hardware */
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+ wmb();
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+ next->link.control ^= TRB_CYCLE;
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+ } else {
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+ break;
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}
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- /* Give this link TRB to the hardware */
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- wmb();
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- if (next->link.control & TRB_CYCLE)
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- next->link.control &= (u32) ~TRB_CYCLE;
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- else
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- next->link.control |= (u32) TRB_CYCLE;
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}
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/* Toggle the cycle bit after the last ring segment. */
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if (last_trb_on_last_seg(xhci, ring, ring->enq_seg, next)) {
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@@ -245,6 +246,13 @@ static int room_on_ring(struct xhci_hcd *xhci, struct xhci_ring *ring,
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struct xhci_segment *cur_seg;
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unsigned int left_on_ring;
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+ /* If we are currently pointing to a link TRB, advance the
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+ * enqueue pointer before checking for space */
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+ while (last_trb(xhci, ring, enq_seg, enq)) {
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+ enq_seg = enq_seg->next;
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+ enq = enq_seg->trbs;
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+ }
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+
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/* Check if ring is empty */
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if (enq == ring->dequeue) {
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/* Can't use link trbs */
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@@ -1728,6 +1736,43 @@ static int prepare_ring(struct xhci_hcd *xhci, struct xhci_ring *ep_ring,
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xhci_err(xhci, "ERROR no room on ep ring\n");
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return -ENOMEM;
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}
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+
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+ if (enqueue_is_link_trb(ep_ring)) {
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+ struct xhci_ring *ring = ep_ring;
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+ union xhci_trb *next;
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+ unsigned long long addr;
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+
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+ xhci_dbg(xhci, "prepare_ring: pointing to link trb\n");
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+ next = ring->enqueue;
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+
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+ while (last_trb(xhci, ring, ring->enq_seg, next)) {
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+
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+ /* If we're not dealing with 0.95 hardware,
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+ * clear the chain bit.
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+ */
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+ if (!xhci_link_trb_quirk(xhci))
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+ next->link.control &= ~TRB_CHAIN;
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+ else
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+ next->link.control |= TRB_CHAIN;
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+
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+ wmb();
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+ next->link.control ^= (u32) TRB_CYCLE;
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+
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+ /* Toggle the cycle bit after the last ring segment. */
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+ if (last_trb_on_last_seg(xhci, ring, ring->enq_seg, next)) {
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+ ring->cycle_state = (ring->cycle_state ? 0 : 1);
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+ if (!in_interrupt()) {
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+ xhci_dbg(xhci, "queue_trb: Toggle cycle "
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+ "state for ring %p = %i\n",
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+ ring, (unsigned int)ring->cycle_state);
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+ }
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+ }
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+ ring->enq_seg = ring->enq_seg->next;
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+ ring->enqueue = ring->enq_seg->trbs;
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+ next = ring->enqueue;
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+ }
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+ }
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+
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return 0;
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}
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