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@@ -796,6 +796,42 @@ static int stb0899_send_diseqc_burst(struct dvb_frontend *fe, fe_sec_mini_cmd_t
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return 0;
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}
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+static int stb0899_diseqc_init(struct stb0899_state *state)
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+{
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+ struct dvb_diseqc_master_cmd tx_data;
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+ struct dvb_diseqc_slave_reply rx_data;
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+
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+ u8 f22_tx, f22_rx, reg;
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+
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+ u32 mclk, tx_freq = 22000, count = 0, i;
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+
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+ u32 trial = 0; /* try max = 2 (try 20khz and 17.5 khz) */
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+ u32 ret_1 = 0; /* 20 Khz status */
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+ u32 ret_2 = 0; /* 17.5 Khz status */
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+
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+ tx_data.msg[0] = 0xe2;
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+ tx_data.msg_len = 3;
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+ reg = stb0899_read_reg(state, STB0899_DISCNTRL2);
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+ STB0899_SETFIELD_VAL(ONECHIP_TRX, reg, 0);
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+ stb0899_write_reg(state, STB0899_DISCNTRL2, reg);
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+
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+ /* disable Tx spy */
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+ reg = stb0899_read_reg(state, STB0899_DISCNTRL1);
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+ STB0899_SETFIELD_VAL(DISEQCRESET, reg, 1);
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+ stb0899_write_reg(state, STB0899_DISCNTRL1, reg);
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+
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+ reg = stb0899_read_reg(state, STB0899_DISCNTRL1);
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+ STB0899_SETFIELD_VAL(DISEQCRESET, reg, 0);
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+ stb0899_write_reg(state, STB0899_DISCNTRL1, reg);
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+
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+ mclk = stb0899_get_mclk(state);
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+ f22_tx = mclk / (tx_freq * 32);
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+ stb0899_write_reg(state, STB0899_DISF22, f22_tx); /* DiSEqC Tx freq */
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+ state->rx_freq = 20000;
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+ f22_rx = mclk / (state->rx_freq * 32);
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+
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+ return 0;
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+}
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static int stb0899_sleep(struct dvb_frontend *fe)
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{
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@@ -863,7 +899,7 @@ static int stb0899_init(struct dvb_frontend *fe)
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stb0899_write_reg(state, config->init_tst[i].address, config->init_tst[i].data);
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stb0899_init_calc(state);
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-// stb0899_diseqc_init(state);
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+ stb0899_diseqc_init(state);
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return 0;
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}
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