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@@ -572,9 +572,11 @@ static int imxdma_xfer_desc(struct imxdma_desc *d)
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imx_dmav1_writel(imxdma, d->len, DMA_CNTR(imxdmac->channel));
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- dev_dbg(imxdma->dev, "%s channel: %d dest=0x%08x src=0x%08x "
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- "dma_length=%d\n", __func__, imxdmac->channel,
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- d->dest, d->src, d->len);
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+ dev_dbg(imxdma->dev,
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+ "%s channel: %d dest=0x%08llx src=0x%08llx dma_length=%zu\n",
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+ __func__, imxdmac->channel,
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+ (unsigned long long)d->dest,
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+ (unsigned long long)d->src, d->len);
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break;
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/* Cyclic transfer is the same as slave_sg with special sg configuration. */
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@@ -586,20 +588,22 @@ static int imxdma_xfer_desc(struct imxdma_desc *d)
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imx_dmav1_writel(imxdma, imxdmac->ccr_from_device,
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DMA_CCR(imxdmac->channel));
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- dev_dbg(imxdma->dev, "%s channel: %d sg=%p sgcount=%d "
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- "total length=%d dev_addr=0x%08x (dev2mem)\n",
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- __func__, imxdmac->channel, d->sg, d->sgcount,
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- d->len, imxdmac->per_address);
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+ dev_dbg(imxdma->dev,
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+ "%s channel: %d sg=%p sgcount=%d total length=%zu dev_addr=0x%08llx (dev2mem)\n",
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+ __func__, imxdmac->channel,
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+ d->sg, d->sgcount, d->len,
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+ (unsigned long long)imxdmac->per_address);
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} else if (d->direction == DMA_MEM_TO_DEV) {
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imx_dmav1_writel(imxdma, imxdmac->per_address,
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DMA_DAR(imxdmac->channel));
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imx_dmav1_writel(imxdma, imxdmac->ccr_to_device,
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DMA_CCR(imxdmac->channel));
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- dev_dbg(imxdma->dev, "%s channel: %d sg=%p sgcount=%d "
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- "total length=%d dev_addr=0x%08x (mem2dev)\n",
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- __func__, imxdmac->channel, d->sg, d->sgcount,
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- d->len, imxdmac->per_address);
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+ dev_dbg(imxdma->dev,
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+ "%s channel: %d sg=%p sgcount=%d total length=%zu dev_addr=0x%08llx (mem2dev)\n",
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+ __func__, imxdmac->channel,
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+ d->sg, d->sgcount, d->len,
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+ (unsigned long long)imxdmac->per_address);
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} else {
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dev_err(imxdma->dev, "%s channel: %d bad dma mode\n",
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__func__, imxdmac->channel);
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@@ -870,7 +874,7 @@ static struct dma_async_tx_descriptor *imxdma_prep_dma_cyclic(
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int i;
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unsigned int periods = buf_len / period_len;
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- dev_dbg(imxdma->dev, "%s channel: %d buf_len=%d period_len=%d\n",
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+ dev_dbg(imxdma->dev, "%s channel: %d buf_len=%zu period_len=%zu\n",
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__func__, imxdmac->channel, buf_len, period_len);
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if (list_empty(&imxdmac->ld_free) ||
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@@ -926,8 +930,9 @@ static struct dma_async_tx_descriptor *imxdma_prep_dma_memcpy(
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struct imxdma_engine *imxdma = imxdmac->imxdma;
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struct imxdma_desc *desc;
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- dev_dbg(imxdma->dev, "%s channel: %d src=0x%x dst=0x%x len=%d\n",
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- __func__, imxdmac->channel, src, dest, len);
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+ dev_dbg(imxdma->dev, "%s channel: %d src=0x%llx dst=0x%llx len=%zu\n",
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+ __func__, imxdmac->channel, (unsigned long long)src,
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+ (unsigned long long)dest, len);
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if (list_empty(&imxdmac->ld_free) ||
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imxdma_chan_is_doing_cyclic(imxdmac))
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@@ -956,9 +961,10 @@ static struct dma_async_tx_descriptor *imxdma_prep_dma_interleaved(
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struct imxdma_engine *imxdma = imxdmac->imxdma;
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struct imxdma_desc *desc;
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- dev_dbg(imxdma->dev, "%s channel: %d src_start=0x%x dst_start=0x%x\n"
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- " src_sgl=%s dst_sgl=%s numf=%d frame_size=%d\n", __func__,
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- imxdmac->channel, xt->src_start, xt->dst_start,
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+ dev_dbg(imxdma->dev, "%s channel: %d src_start=0x%llx dst_start=0x%llx\n"
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+ " src_sgl=%s dst_sgl=%s numf=%zu frame_size=%zu\n", __func__,
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+ imxdmac->channel, (unsigned long long)xt->src_start,
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+ (unsigned long long) xt->dst_start,
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xt->src_sgl ? "true" : "false", xt->dst_sgl ? "true" : "false",
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xt->numf, xt->frame_size);
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