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@@ -17,13 +17,15 @@
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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-/*P:450 This file contains the x86-specific lguest code. It used to be all
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+/*P:450
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+ * This file contains the x86-specific lguest code. It used to be all
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* mixed in with drivers/lguest/core.c but several foolhardy code slashers
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* wrestled most of the dependencies out to here in preparation for porting
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* lguest to other architectures (see what I mean by foolhardy?).
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*
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* This also contains a couple of non-obvious setup and teardown pieces which
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- * were implemented after days of debugging pain. :*/
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+ * were implemented after days of debugging pain.
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+:*/
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#include <linux/kernel.h>
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#include <linux/start_kernel.h>
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#include <linux/string.h>
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@@ -82,25 +84,33 @@ static DEFINE_PER_CPU(struct lg_cpu *, last_cpu);
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*/
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static void copy_in_guest_info(struct lg_cpu *cpu, struct lguest_pages *pages)
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{
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- /* Copying all this data can be quite expensive. We usually run the
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+ /*
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+ * Copying all this data can be quite expensive. We usually run the
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* same Guest we ran last time (and that Guest hasn't run anywhere else
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* meanwhile). If that's not the case, we pretend everything in the
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- * Guest has changed. */
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+ * Guest has changed.
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+ */
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if (__get_cpu_var(last_cpu) != cpu || cpu->last_pages != pages) {
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__get_cpu_var(last_cpu) = cpu;
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cpu->last_pages = pages;
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cpu->changed = CHANGED_ALL;
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}
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- /* These copies are pretty cheap, so we do them unconditionally: */
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- /* Save the current Host top-level page directory. */
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+ /*
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+ * These copies are pretty cheap, so we do them unconditionally: */
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+ /* Save the current Host top-level page directory.
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+ */
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pages->state.host_cr3 = __pa(current->mm->pgd);
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- /* Set up the Guest's page tables to see this CPU's pages (and no
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- * other CPU's pages). */
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+ /*
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+ * Set up the Guest's page tables to see this CPU's pages (and no
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+ * other CPU's pages).
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+ */
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map_switcher_in_guest(cpu, pages);
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- /* Set up the two "TSS" members which tell the CPU what stack to use
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+ /*
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+ * Set up the two "TSS" members which tell the CPU what stack to use
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* for traps which do directly into the Guest (ie. traps at privilege
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- * level 1). */
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+ * level 1).
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+ */
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pages->state.guest_tss.sp1 = cpu->esp1;
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pages->state.guest_tss.ss1 = cpu->ss1;
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@@ -125,97 +135,126 @@ static void run_guest_once(struct lg_cpu *cpu, struct lguest_pages *pages)
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/* This is a dummy value we need for GCC's sake. */
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unsigned int clobber;
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- /* Copy the guest-specific information into this CPU's "struct
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- * lguest_pages". */
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+ /*
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+ * Copy the guest-specific information into this CPU's "struct
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+ * lguest_pages".
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+ */
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copy_in_guest_info(cpu, pages);
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- /* Set the trap number to 256 (impossible value). If we fault while
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+ /*
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+ * Set the trap number to 256 (impossible value). If we fault while
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* switching to the Guest (bad segment registers or bug), this will
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- * cause us to abort the Guest. */
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+ * cause us to abort the Guest.
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+ */
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cpu->regs->trapnum = 256;
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- /* Now: we push the "eflags" register on the stack, then do an "lcall".
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+ /*
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+ * Now: we push the "eflags" register on the stack, then do an "lcall".
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* This is how we change from using the kernel code segment to using
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* the dedicated lguest code segment, as well as jumping into the
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* Switcher.
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*
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* The lcall also pushes the old code segment (KERNEL_CS) onto the
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* stack, then the address of this call. This stack layout happens to
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- * exactly match the stack layout created by an interrupt... */
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+ * exactly match the stack layout created by an interrupt...
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+ */
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asm volatile("pushf; lcall *lguest_entry"
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- /* This is how we tell GCC that %eax ("a") and %ebx ("b")
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- * are changed by this routine. The "=" means output. */
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+ /*
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+ * This is how we tell GCC that %eax ("a") and %ebx ("b")
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+ * are changed by this routine. The "=" means output.
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+ */
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: "=a"(clobber), "=b"(clobber)
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- /* %eax contains the pages pointer. ("0" refers to the
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+ /*
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+ * %eax contains the pages pointer. ("0" refers to the
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* 0-th argument above, ie "a"). %ebx contains the
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* physical address of the Guest's top-level page
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- * directory. */
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+ * directory.
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+ */
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: "0"(pages), "1"(__pa(cpu->lg->pgdirs[cpu->cpu_pgd].pgdir))
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- /* We tell gcc that all these registers could change,
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+ /*
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+ * We tell gcc that all these registers could change,
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* which means we don't have to save and restore them in
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- * the Switcher. */
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+ * the Switcher.
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+ */
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: "memory", "%edx", "%ecx", "%edi", "%esi");
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}
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/*:*/
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-/*M:002 There are hooks in the scheduler which we can register to tell when we
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+/*M:002
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+ * There are hooks in the scheduler which we can register to tell when we
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* get kicked off the CPU (preempt_notifier_register()). This would allow us
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* to lazily disable SYSENTER which would regain some performance, and should
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* also simplify copy_in_guest_info(). Note that we'd still need to restore
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* things when we exit to Launcher userspace, but that's fairly easy.
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*
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- * We could also try using this hooks for PGE, but that might be too expensive.
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+ * We could also try using these hooks for PGE, but that might be too expensive.
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*
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- * The hooks were designed for KVM, but we can also put them to good use. :*/
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+ * The hooks were designed for KVM, but we can also put them to good use.
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+:*/
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-/*H:040 This is the i386-specific code to setup and run the Guest. Interrupts
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- * are disabled: we own the CPU. */
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+/*H:040
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+ * This is the i386-specific code to setup and run the Guest. Interrupts
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+ * are disabled: we own the CPU.
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+ */
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void lguest_arch_run_guest(struct lg_cpu *cpu)
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{
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- /* Remember the awfully-named TS bit? If the Guest has asked to set it
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+ /*
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+ * Remember the awfully-named TS bit? If the Guest has asked to set it
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* we set it now, so we can trap and pass that trap to the Guest if it
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- * uses the FPU. */
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+ * uses the FPU.
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+ */
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if (cpu->ts)
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unlazy_fpu(current);
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- /* SYSENTER is an optimized way of doing system calls. We can't allow
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+ /*
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+ * SYSENTER is an optimized way of doing system calls. We can't allow
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* it because it always jumps to privilege level 0. A normal Guest
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* won't try it because we don't advertise it in CPUID, but a malicious
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* Guest (or malicious Guest userspace program) could, so we tell the
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- * CPU to disable it before running the Guest. */
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+ * CPU to disable it before running the Guest.
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+ */
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if (boot_cpu_has(X86_FEATURE_SEP))
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wrmsr(MSR_IA32_SYSENTER_CS, 0, 0);
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- /* Now we actually run the Guest. It will return when something
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+ /*
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+ * Now we actually run the Guest. It will return when something
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* interesting happens, and we can examine its registers to see what it
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- * was doing. */
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+ * was doing.
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+ */
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run_guest_once(cpu, lguest_pages(raw_smp_processor_id()));
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- /* Note that the "regs" structure contains two extra entries which are
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+ /*
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+ * Note that the "regs" structure contains two extra entries which are
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* not really registers: a trap number which says what interrupt or
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* trap made the switcher code come back, and an error code which some
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- * traps set. */
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+ * traps set.
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+ */
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/* Restore SYSENTER if it's supposed to be on. */
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if (boot_cpu_has(X86_FEATURE_SEP))
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wrmsr(MSR_IA32_SYSENTER_CS, __KERNEL_CS, 0);
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- /* If the Guest page faulted, then the cr2 register will tell us the
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+ /*
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+ * If the Guest page faulted, then the cr2 register will tell us the
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* bad virtual address. We have to grab this now, because once we
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* re-enable interrupts an interrupt could fault and thus overwrite
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- * cr2, or we could even move off to a different CPU. */
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+ * cr2, or we could even move off to a different CPU.
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+ */
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if (cpu->regs->trapnum == 14)
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cpu->arch.last_pagefault = read_cr2();
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- /* Similarly, if we took a trap because the Guest used the FPU,
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+ /*
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+ * Similarly, if we took a trap because the Guest used the FPU,
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* we have to restore the FPU it expects to see.
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* math_state_restore() may sleep and we may even move off to
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* a different CPU. So all the critical stuff should be done
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- * before this. */
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+ * before this.
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+ */
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else if (cpu->regs->trapnum == 7)
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math_state_restore();
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}
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-/*H:130 Now we've examined the hypercall code; our Guest can make requests.
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+/*H:130
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+ * Now we've examined the hypercall code; our Guest can make requests.
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* Our Guest is usually so well behaved; it never tries to do things it isn't
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* allowed to, and uses hypercalls instead. Unfortunately, Linux's paravirtual
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* infrastructure isn't quite complete, because it doesn't contain replacements
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@@ -225,26 +264,33 @@ void lguest_arch_run_guest(struct lg_cpu *cpu)
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*
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* When the Guest uses one of these instructions, we get a trap (General
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* Protection Fault) and come here. We see if it's one of those troublesome
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- * instructions and skip over it. We return true if we did. */
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+ * instructions and skip over it. We return true if we did.
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+ */
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static int emulate_insn(struct lg_cpu *cpu)
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{
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u8 insn;
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unsigned int insnlen = 0, in = 0, shift = 0;
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- /* The eip contains the *virtual* address of the Guest's instruction:
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- * guest_pa just subtracts the Guest's page_offset. */
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+ /*
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+ * The eip contains the *virtual* address of the Guest's instruction:
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+ * guest_pa just subtracts the Guest's page_offset.
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+ */
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unsigned long physaddr = guest_pa(cpu, cpu->regs->eip);
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- /* This must be the Guest kernel trying to do something, not userspace!
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+ /*
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+ * This must be the Guest kernel trying to do something, not userspace!
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* The bottom two bits of the CS segment register are the privilege
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- * level. */
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+ * level.
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+ */
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if ((cpu->regs->cs & 3) != GUEST_PL)
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return 0;
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/* Decoding x86 instructions is icky. */
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insn = lgread(cpu, physaddr, u8);
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- /* 0x66 is an "operand prefix". It means it's using the upper 16 bits
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- of the eax register. */
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+ /*
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+ * 0x66 is an "operand prefix". It means it's using the upper 16 bits
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+ * of the eax register.
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+ */
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if (insn == 0x66) {
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shift = 16;
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/* The instruction is 1 byte so far, read the next byte. */
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@@ -252,8 +298,10 @@ static int emulate_insn(struct lg_cpu *cpu)
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insn = lgread(cpu, physaddr + insnlen, u8);
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}
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- /* We can ignore the lower bit for the moment and decode the 4 opcodes
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- * we need to emulate. */
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+ /*
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+ * We can ignore the lower bit for the moment and decode the 4 opcodes
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+ * we need to emulate.
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+ */
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switch (insn & 0xFE) {
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case 0xE4: /* in <next byte>,%al */
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insnlen += 2;
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@@ -274,9 +322,11 @@ static int emulate_insn(struct lg_cpu *cpu)
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return 0;
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}
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- /* If it was an "IN" instruction, they expect the result to be read
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+ /*
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+ * If it was an "IN" instruction, they expect the result to be read
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* into %eax, so we change %eax. We always return all-ones, which
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- * traditionally means "there's nothing there". */
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+ * traditionally means "there's nothing there".
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+ */
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if (in) {
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/* Lower bit tells is whether it's a 16 or 32 bit access */
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if (insn & 0x1)
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@@ -290,7 +340,8 @@ static int emulate_insn(struct lg_cpu *cpu)
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return 1;
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}
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-/* Our hypercalls mechanism used to be based on direct software interrupts.
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+/*
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+ * Our hypercalls mechanism used to be based on direct software interrupts.
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* After Anthony's "Refactor hypercall infrastructure" kvm patch, we decided to
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* change over to using kvm hypercalls.
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*
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@@ -318,16 +369,20 @@ static int emulate_insn(struct lg_cpu *cpu)
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*/
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static void rewrite_hypercall(struct lg_cpu *cpu)
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{
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- /* This are the opcodes we use to patch the Guest. The opcode for "int
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+ /*
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+ * This are the opcodes we use to patch the Guest. The opcode for "int
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* $0x1f" is "0xcd 0x1f" but vmcall instruction is 3 bytes long, so we
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- * complete the sequence with a NOP (0x90). */
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+ * complete the sequence with a NOP (0x90).
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+ */
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u8 insn[3] = {0xcd, 0x1f, 0x90};
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__lgwrite(cpu, guest_pa(cpu, cpu->regs->eip), insn, sizeof(insn));
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- /* The above write might have caused a copy of that page to be made
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+ /*
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+ * The above write might have caused a copy of that page to be made
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* (if it was read-only). We need to make sure the Guest has
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* up-to-date pagetables. As this doesn't happen often, we can just
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- * drop them all. */
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+ * drop them all.
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+ */
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guest_pagetable_clear_all(cpu);
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}
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@@ -335,9 +390,11 @@ static bool is_hypercall(struct lg_cpu *cpu)
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{
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u8 insn[3];
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- /* This must be the Guest kernel trying to do something.
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+ /*
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+ * This must be the Guest kernel trying to do something.
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* The bottom two bits of the CS segment register are the privilege
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- * level. */
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+ * level.
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+ */
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if ((cpu->regs->cs & 3) != GUEST_PL)
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return false;
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@@ -351,86 +408,105 @@ void lguest_arch_handle_trap(struct lg_cpu *cpu)
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{
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switch (cpu->regs->trapnum) {
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case 13: /* We've intercepted a General Protection Fault. */
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- /* Check if this was one of those annoying IN or OUT
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+ /*
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+ * Check if this was one of those annoying IN or OUT
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* instructions which we need to emulate. If so, we just go
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- * back into the Guest after we've done it. */
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+ * back into the Guest after we've done it.
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+ */
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if (cpu->regs->errcode == 0) {
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if (emulate_insn(cpu))
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return;
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}
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- /* If KVM is active, the vmcall instruction triggers a
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- * General Protection Fault. Normally it triggers an
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- * invalid opcode fault (6): */
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+ /*
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+ * If KVM is active, the vmcall instruction triggers a General
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+ * Protection Fault. Normally it triggers an invalid opcode
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+ * fault (6):
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+ */
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case 6:
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- /* We need to check if ring == GUEST_PL and
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- * faulting instruction == vmcall. */
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+ /*
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+ * We need to check if ring == GUEST_PL and faulting
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+ * instruction == vmcall.
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+ */
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if (is_hypercall(cpu)) {
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rewrite_hypercall(cpu);
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return;
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}
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break;
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case 14: /* We've intercepted a Page Fault. */
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- /* The Guest accessed a virtual address that wasn't mapped.
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+ /*
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+ * The Guest accessed a virtual address that wasn't mapped.
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* This happens a lot: we don't actually set up most of the page
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* tables for the Guest at all when we start: as it runs it asks
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* for more and more, and we set them up as required. In this
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* case, we don't even tell the Guest that the fault happened.
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*
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* The errcode tells whether this was a read or a write, and
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- * whether kernel or userspace code. */
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+ * whether kernel or userspace code.
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+ */
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if (demand_page(cpu, cpu->arch.last_pagefault,
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cpu->regs->errcode))
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return;
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- /* OK, it's really not there (or not OK): the Guest needs to
|
|
|
+ /*
|
|
|
+ * OK, it's really not there (or not OK): the Guest needs to
|
|
|
* know. We write out the cr2 value so it knows where the
|
|
|
* fault occurred.
|
|
|
*
|
|
|
* Note that if the Guest were really messed up, this could
|
|
|
* happen before it's done the LHCALL_LGUEST_INIT hypercall, so
|
|
|
- * lg->lguest_data could be NULL */
|
|
|
+ * lg->lguest_data could be NULL
|
|
|
+ */
|
|
|
if (cpu->lg->lguest_data &&
|
|
|
put_user(cpu->arch.last_pagefault,
|
|
|
&cpu->lg->lguest_data->cr2))
|
|
|
kill_guest(cpu, "Writing cr2");
|
|
|
break;
|
|
|
case 7: /* We've intercepted a Device Not Available fault. */
|
|
|
- /* If the Guest doesn't want to know, we already restored the
|
|
|
- * Floating Point Unit, so we just continue without telling
|
|
|
- * it. */
|
|
|
+ /*
|
|
|
+ * If the Guest doesn't want to know, we already restored the
|
|
|
+ * Floating Point Unit, so we just continue without telling it.
|
|
|
+ */
|
|
|
if (!cpu->ts)
|
|
|
return;
|
|
|
break;
|
|
|
case 32 ... 255:
|
|
|
- /* These values mean a real interrupt occurred, in which case
|
|
|
+ /*
|
|
|
+ * These values mean a real interrupt occurred, in which case
|
|
|
* the Host handler has already been run. We just do a
|
|
|
* friendly check if another process should now be run, then
|
|
|
- * return to run the Guest again */
|
|
|
+ * return to run the Guest again
|
|
|
+ */
|
|
|
cond_resched();
|
|
|
return;
|
|
|
case LGUEST_TRAP_ENTRY:
|
|
|
- /* Our 'struct hcall_args' maps directly over our regs: we set
|
|
|
- * up the pointer now to indicate a hypercall is pending. */
|
|
|
+ /*
|
|
|
+ * Our 'struct hcall_args' maps directly over our regs: we set
|
|
|
+ * up the pointer now to indicate a hypercall is pending.
|
|
|
+ */
|
|
|
cpu->hcall = (struct hcall_args *)cpu->regs;
|
|
|
return;
|
|
|
}
|
|
|
|
|
|
/* We didn't handle the trap, so it needs to go to the Guest. */
|
|
|
if (!deliver_trap(cpu, cpu->regs->trapnum))
|
|
|
- /* If the Guest doesn't have a handler (either it hasn't
|
|
|
+ /*
|
|
|
+ * If the Guest doesn't have a handler (either it hasn't
|
|
|
* registered any yet, or it's one of the faults we don't let
|
|
|
- * it handle), it dies with this cryptic error message. */
|
|
|
+ * it handle), it dies with this cryptic error message.
|
|
|
+ */
|
|
|
kill_guest(cpu, "unhandled trap %li at %#lx (%#lx)",
|
|
|
cpu->regs->trapnum, cpu->regs->eip,
|
|
|
cpu->regs->trapnum == 14 ? cpu->arch.last_pagefault
|
|
|
: cpu->regs->errcode);
|
|
|
}
|
|
|
|
|
|
-/* Now we can look at each of the routines this calls, in increasing order of
|
|
|
+/*
|
|
|
+ * Now we can look at each of the routines this calls, in increasing order of
|
|
|
* complexity: do_hypercalls(), emulate_insn(), maybe_do_interrupt(),
|
|
|
* deliver_trap() and demand_page(). After all those, we'll be ready to
|
|
|
* examine the Switcher, and our philosophical understanding of the Host/Guest
|
|
|
- * duality will be complete. :*/
|
|
|
+ * duality will be complete.
|
|
|
+:*/
|
|
|
static void adjust_pge(void *on)
|
|
|
{
|
|
|
if (on)
|
|
@@ -439,13 +515,16 @@ static void adjust_pge(void *on)
|
|
|
write_cr4(read_cr4() & ~X86_CR4_PGE);
|
|
|
}
|
|
|
|
|
|
-/*H:020 Now the Switcher is mapped and every thing else is ready, we need to do
|
|
|
- * some more i386-specific initialization. */
|
|
|
+/*H:020
|
|
|
+ * Now the Switcher is mapped and every thing else is ready, we need to do
|
|
|
+ * some more i386-specific initialization.
|
|
|
+ */
|
|
|
void __init lguest_arch_host_init(void)
|
|
|
{
|
|
|
int i;
|
|
|
|
|
|
- /* Most of the i386/switcher.S doesn't care that it's been moved; on
|
|
|
+ /*
|
|
|
+ * Most of the i386/switcher.S doesn't care that it's been moved; on
|
|
|
* Intel, jumps are relative, and it doesn't access any references to
|
|
|
* external code or data.
|
|
|
*
|
|
@@ -453,7 +532,8 @@ void __init lguest_arch_host_init(void)
|
|
|
* addresses are placed in a table (default_idt_entries), so we need to
|
|
|
* update the table with the new addresses. switcher_offset() is a
|
|
|
* convenience function which returns the distance between the
|
|
|
- * compiled-in switcher code and the high-mapped copy we just made. */
|
|
|
+ * compiled-in switcher code and the high-mapped copy we just made.
|
|
|
+ */
|
|
|
for (i = 0; i < IDT_ENTRIES; i++)
|
|
|
default_idt_entries[i] += switcher_offset();
|
|
|
|
|
@@ -468,63 +548,81 @@ void __init lguest_arch_host_init(void)
|
|
|
for_each_possible_cpu(i) {
|
|
|
/* lguest_pages() returns this CPU's two pages. */
|
|
|
struct lguest_pages *pages = lguest_pages(i);
|
|
|
- /* This is a convenience pointer to make the code fit one
|
|
|
- * statement to a line. */
|
|
|
+ /* This is a convenience pointer to make the code neater. */
|
|
|
struct lguest_ro_state *state = &pages->state;
|
|
|
|
|
|
- /* The Global Descriptor Table: the Host has a different one
|
|
|
+ /*
|
|
|
+ * The Global Descriptor Table: the Host has a different one
|
|
|
* for each CPU. We keep a descriptor for the GDT which says
|
|
|
* where it is and how big it is (the size is actually the last
|
|
|
- * byte, not the size, hence the "-1"). */
|
|
|
+ * byte, not the size, hence the "-1").
|
|
|
+ */
|
|
|
state->host_gdt_desc.size = GDT_SIZE-1;
|
|
|
state->host_gdt_desc.address = (long)get_cpu_gdt_table(i);
|
|
|
|
|
|
- /* All CPUs on the Host use the same Interrupt Descriptor
|
|
|
+ /*
|
|
|
+ * All CPUs on the Host use the same Interrupt Descriptor
|
|
|
* Table, so we just use store_idt(), which gets this CPU's IDT
|
|
|
- * descriptor. */
|
|
|
+ * descriptor.
|
|
|
+ */
|
|
|
store_idt(&state->host_idt_desc);
|
|
|
|
|
|
- /* The descriptors for the Guest's GDT and IDT can be filled
|
|
|
+ /*
|
|
|
+ * The descriptors for the Guest's GDT and IDT can be filled
|
|
|
* out now, too. We copy the GDT & IDT into ->guest_gdt and
|
|
|
- * ->guest_idt before actually running the Guest. */
|
|
|
+ * ->guest_idt before actually running the Guest.
|
|
|
+ */
|
|
|
state->guest_idt_desc.size = sizeof(state->guest_idt)-1;
|
|
|
state->guest_idt_desc.address = (long)&state->guest_idt;
|
|
|
state->guest_gdt_desc.size = sizeof(state->guest_gdt)-1;
|
|
|
state->guest_gdt_desc.address = (long)&state->guest_gdt;
|
|
|
|
|
|
- /* We know where we want the stack to be when the Guest enters
|
|
|
+ /*
|
|
|
+ * We know where we want the stack to be when the Guest enters
|
|
|
* the Switcher: in pages->regs. The stack grows upwards, so
|
|
|
- * we start it at the end of that structure. */
|
|
|
+ * we start it at the end of that structure.
|
|
|
+ */
|
|
|
state->guest_tss.sp0 = (long)(&pages->regs + 1);
|
|
|
- /* And this is the GDT entry to use for the stack: we keep a
|
|
|
- * couple of special LGUEST entries. */
|
|
|
+ /*
|
|
|
+ * And this is the GDT entry to use for the stack: we keep a
|
|
|
+ * couple of special LGUEST entries.
|
|
|
+ */
|
|
|
state->guest_tss.ss0 = LGUEST_DS;
|
|
|
|
|
|
- /* x86 can have a finegrained bitmap which indicates what I/O
|
|
|
+ /*
|
|
|
+ * x86 can have a finegrained bitmap which indicates what I/O
|
|
|
* ports the process can use. We set it to the end of our
|
|
|
- * structure, meaning "none". */
|
|
|
+ * structure, meaning "none".
|
|
|
+ */
|
|
|
state->guest_tss.io_bitmap_base = sizeof(state->guest_tss);
|
|
|
|
|
|
- /* Some GDT entries are the same across all Guests, so we can
|
|
|
- * set them up now. */
|
|
|
+ /*
|
|
|
+ * Some GDT entries are the same across all Guests, so we can
|
|
|
+ * set them up now.
|
|
|
+ */
|
|
|
setup_default_gdt_entries(state);
|
|
|
/* Most IDT entries are the same for all Guests, too.*/
|
|
|
setup_default_idt_entries(state, default_idt_entries);
|
|
|
|
|
|
- /* The Host needs to be able to use the LGUEST segments on this
|
|
|
- * CPU, too, so put them in the Host GDT. */
|
|
|
+ /*
|
|
|
+ * The Host needs to be able to use the LGUEST segments on this
|
|
|
+ * CPU, too, so put them in the Host GDT.
|
|
|
+ */
|
|
|
get_cpu_gdt_table(i)[GDT_ENTRY_LGUEST_CS] = FULL_EXEC_SEGMENT;
|
|
|
get_cpu_gdt_table(i)[GDT_ENTRY_LGUEST_DS] = FULL_SEGMENT;
|
|
|
}
|
|
|
|
|
|
- /* In the Switcher, we want the %cs segment register to use the
|
|
|
+ /*
|
|
|
+ * In the Switcher, we want the %cs segment register to use the
|
|
|
* LGUEST_CS GDT entry: we've put that in the Host and Guest GDTs, so
|
|
|
* it will be undisturbed when we switch. To change %cs and jump we
|
|
|
- * need this structure to feed to Intel's "lcall" instruction. */
|
|
|
+ * need this structure to feed to Intel's "lcall" instruction.
|
|
|
+ */
|
|
|
lguest_entry.offset = (long)switch_to_guest + switcher_offset();
|
|
|
lguest_entry.segment = LGUEST_CS;
|
|
|
|
|
|
- /* Finally, we need to turn off "Page Global Enable". PGE is an
|
|
|
+ /*
|
|
|
+ * Finally, we need to turn off "Page Global Enable". PGE is an
|
|
|
* optimization where page table entries are specially marked to show
|
|
|
* they never change. The Host kernel marks all the kernel pages this
|
|
|
* way because it's always present, even when userspace is running.
|
|
@@ -534,16 +632,21 @@ void __init lguest_arch_host_init(void)
|
|
|
* you'll get really weird bugs that you'll chase for two days.
|
|
|
*
|
|
|
* I used to turn PGE off every time we switched to the Guest and back
|
|
|
- * on when we return, but that slowed the Switcher down noticibly. */
|
|
|
+ * on when we return, but that slowed the Switcher down noticibly.
|
|
|
+ */
|
|
|
|
|
|
- /* We don't need the complexity of CPUs coming and going while we're
|
|
|
- * doing this. */
|
|
|
+ /*
|
|
|
+ * We don't need the complexity of CPUs coming and going while we're
|
|
|
+ * doing this.
|
|
|
+ */
|
|
|
get_online_cpus();
|
|
|
if (cpu_has_pge) { /* We have a broader idea of "global". */
|
|
|
/* Remember that this was originally set (for cleanup). */
|
|
|
cpu_had_pge = 1;
|
|
|
- /* adjust_pge is a helper function which sets or unsets the PGE
|
|
|
- * bit on its CPU, depending on the argument (0 == unset). */
|
|
|
+ /*
|
|
|
+ * adjust_pge is a helper function which sets or unsets the PGE
|
|
|
+ * bit on its CPU, depending on the argument (0 == unset).
|
|
|
+ */
|
|
|
on_each_cpu(adjust_pge, (void *)0, 1);
|
|
|
/* Turn off the feature in the global feature set. */
|
|
|
clear_cpu_cap(&boot_cpu_data, X86_FEATURE_PGE);
|
|
@@ -590,26 +693,32 @@ int lguest_arch_init_hypercalls(struct lg_cpu *cpu)
|
|
|
{
|
|
|
u32 tsc_speed;
|
|
|
|
|
|
- /* The pointer to the Guest's "struct lguest_data" is the only argument.
|
|
|
- * We check that address now. */
|
|
|
+ /*
|
|
|
+ * The pointer to the Guest's "struct lguest_data" is the only argument.
|
|
|
+ * We check that address now.
|
|
|
+ */
|
|
|
if (!lguest_address_ok(cpu->lg, cpu->hcall->arg1,
|
|
|
sizeof(*cpu->lg->lguest_data)))
|
|
|
return -EFAULT;
|
|
|
|
|
|
- /* Having checked it, we simply set lg->lguest_data to point straight
|
|
|
+ /*
|
|
|
+ * Having checked it, we simply set lg->lguest_data to point straight
|
|
|
* into the Launcher's memory at the right place and then use
|
|
|
* copy_to_user/from_user from now on, instead of lgread/write. I put
|
|
|
* this in to show that I'm not immune to writing stupid
|
|
|
- * optimizations. */
|
|
|
+ * optimizations.
|
|
|
+ */
|
|
|
cpu->lg->lguest_data = cpu->lg->mem_base + cpu->hcall->arg1;
|
|
|
|
|
|
- /* We insist that the Time Stamp Counter exist and doesn't change with
|
|
|
+ /*
|
|
|
+ * We insist that the Time Stamp Counter exist and doesn't change with
|
|
|
* cpu frequency. Some devious chip manufacturers decided that TSC
|
|
|
* changes could be handled in software. I decided that time going
|
|
|
* backwards might be good for benchmarks, but it's bad for users.
|
|
|
*
|
|
|
* We also insist that the TSC be stable: the kernel detects unreliable
|
|
|
- * TSCs for its own purposes, and we use that here. */
|
|
|
+ * TSCs for its own purposes, and we use that here.
|
|
|
+ */
|
|
|
if (boot_cpu_has(X86_FEATURE_CONSTANT_TSC) && !check_tsc_unstable())
|
|
|
tsc_speed = tsc_khz;
|
|
|
else
|
|
@@ -625,38 +734,47 @@ int lguest_arch_init_hypercalls(struct lg_cpu *cpu)
|
|
|
}
|
|
|
/*:*/
|
|
|
|
|
|
-/*L:030 lguest_arch_setup_regs()
|
|
|
+/*L:030
|
|
|
+ * lguest_arch_setup_regs()
|
|
|
*
|
|
|
* Most of the Guest's registers are left alone: we used get_zeroed_page() to
|
|
|
- * allocate the structure, so they will be 0. */
|
|
|
+ * allocate the structure, so they will be 0.
|
|
|
+ */
|
|
|
void lguest_arch_setup_regs(struct lg_cpu *cpu, unsigned long start)
|
|
|
{
|
|
|
struct lguest_regs *regs = cpu->regs;
|
|
|
|
|
|
- /* There are four "segment" registers which the Guest needs to boot:
|
|
|
+ /*
|
|
|
+ * There are four "segment" registers which the Guest needs to boot:
|
|
|
* The "code segment" register (cs) refers to the kernel code segment
|
|
|
* __KERNEL_CS, and the "data", "extra" and "stack" segment registers
|
|
|
* refer to the kernel data segment __KERNEL_DS.
|
|
|
*
|
|
|
* The privilege level is packed into the lower bits. The Guest runs
|
|
|
- * at privilege level 1 (GUEST_PL).*/
|
|
|
+ * at privilege level 1 (GUEST_PL).
|
|
|
+ */
|
|
|
regs->ds = regs->es = regs->ss = __KERNEL_DS|GUEST_PL;
|
|
|
regs->cs = __KERNEL_CS|GUEST_PL;
|
|
|
|
|
|
- /* The "eflags" register contains miscellaneous flags. Bit 1 (0x002)
|
|
|
+ /*
|
|
|
+ * The "eflags" register contains miscellaneous flags. Bit 1 (0x002)
|
|
|
* is supposed to always be "1". Bit 9 (0x200) controls whether
|
|
|
* interrupts are enabled. We always leave interrupts enabled while
|
|
|
- * running the Guest. */
|
|
|
+ * running the Guest.
|
|
|
+ */
|
|
|
regs->eflags = X86_EFLAGS_IF | 0x2;
|
|
|
|
|
|
- /* The "Extended Instruction Pointer" register says where the Guest is
|
|
|
- * running. */
|
|
|
+ /*
|
|
|
+ * The "Extended Instruction Pointer" register says where the Guest is
|
|
|
+ * running.
|
|
|
+ */
|
|
|
regs->eip = start;
|
|
|
|
|
|
- /* %esi points to our boot information, at physical address 0, so don't
|
|
|
- * touch it. */
|
|
|
+ /*
|
|
|
+ * %esi points to our boot information, at physical address 0, so don't
|
|
|
+ * touch it.
|
|
|
+ */
|
|
|
|
|
|
- /* There are a couple of GDT entries the Guest expects when first
|
|
|
- * booting. */
|
|
|
+ /* There are a couple of GDT entries the Guest expects at boot. */
|
|
|
setup_guest_gdt(cpu);
|
|
|
}
|