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@@ -7752,29 +7752,6 @@ skip_sriov:
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if (ixgbe_pcie_from_parent(hw))
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ixgbe_get_parent_bus_info(adapter);
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- /* print bus type/speed/width info */
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- e_dev_info("(PCI Express:%s:%s) %pM\n",
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- (hw->bus.speed == ixgbe_bus_speed_8000 ? "8.0GT/s" :
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- hw->bus.speed == ixgbe_bus_speed_5000 ? "5.0GT/s" :
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- hw->bus.speed == ixgbe_bus_speed_2500 ? "2.5GT/s" :
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- "Unknown"),
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- (hw->bus.width == ixgbe_bus_width_pcie_x8 ? "Width x8" :
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- hw->bus.width == ixgbe_bus_width_pcie_x4 ? "Width x4" :
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- hw->bus.width == ixgbe_bus_width_pcie_x1 ? "Width x1" :
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- "Unknown"),
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- netdev->dev_addr);
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-
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- err = ixgbe_read_pba_string_generic(hw, part_str, IXGBE_PBANUM_LENGTH);
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- if (err)
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- strncpy(part_str, "Unknown", IXGBE_PBANUM_LENGTH);
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- if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
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- e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
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- hw->mac.type, hw->phy.type, hw->phy.sfp_type,
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- part_str);
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- else
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- e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
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- hw->mac.type, hw->phy.type, part_str);
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-
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/* calculate the expected PCIe bandwidth required for optimal
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* performance. Note that some older parts will never have enough
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* bandwidth due to being older generation PCIe parts. We clamp these
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@@ -7790,6 +7767,19 @@ skip_sriov:
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}
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ixgbe_check_minimum_link(adapter, expected_gts);
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+ err = ixgbe_read_pba_string_generic(hw, part_str, IXGBE_PBANUM_LENGTH);
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+ if (err)
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+ strncpy(part_str, "Unknown", IXGBE_PBANUM_LENGTH);
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+ if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
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+ e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
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+ hw->mac.type, hw->phy.type, hw->phy.sfp_type,
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+ part_str);
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+ else
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+ e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
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+ hw->mac.type, hw->phy.type, part_str);
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+
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+ e_dev_info("%pM\n", netdev->dev_addr);
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+
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/* reset the hardware with the new settings */
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err = hw->mac.ops.start_hw(hw);
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if (err == IXGBE_ERR_EEPROM_VERSION) {
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