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@@ -2797,11 +2797,6 @@ int iwl4965_hw_tx_queue_init(struct iwl4965_priv *priv, struct iwl4965_tx_queue
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return 0;
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return 0;
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}
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}
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-static inline u8 iwl4965_get_dma_hi_address(dma_addr_t addr)
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-{
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- return sizeof(addr) > sizeof(u32) ? (addr >> 16) >> 16 : 0;
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-}
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-
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int iwl4965_hw_txq_attach_buf_to_tfd(struct iwl4965_priv *priv, void *ptr,
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int iwl4965_hw_txq_attach_buf_to_tfd(struct iwl4965_priv *priv, void *ptr,
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dma_addr_t addr, u16 len)
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dma_addr_t addr, u16 len)
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{
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{
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@@ -2822,7 +2817,7 @@ int iwl4965_hw_txq_attach_buf_to_tfd(struct iwl4965_priv *priv, void *ptr,
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if (!is_odd) {
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if (!is_odd) {
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tfd->pa[index].tb1_addr = cpu_to_le32(addr);
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tfd->pa[index].tb1_addr = cpu_to_le32(addr);
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IWL_SET_BITS(tfd->pa[index], tb1_addr_hi,
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IWL_SET_BITS(tfd->pa[index], tb1_addr_hi,
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- iwl4965_get_dma_hi_address(addr));
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+ iwl_get_dma_hi_address(addr));
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IWL_SET_BITS(tfd->pa[index], tb1_len, len);
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IWL_SET_BITS(tfd->pa[index], tb1_len, len);
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} else {
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} else {
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IWL_SET_BITS(tfd->pa[index], tb2_addr_lo16,
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IWL_SET_BITS(tfd->pa[index], tb2_addr_lo16,
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@@ -3289,7 +3284,7 @@ int iwl4965_tx_cmd(struct iwl4965_priv *priv, struct iwl4965_cmd *out_cmd,
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scratch_phys = txcmd_phys + sizeof(struct iwl4965_cmd_header) +
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scratch_phys = txcmd_phys + sizeof(struct iwl4965_cmd_header) +
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offsetof(struct iwl4965_tx_cmd, scratch);
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offsetof(struct iwl4965_tx_cmd, scratch);
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tx->dram_lsb_ptr = cpu_to_le32(scratch_phys);
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tx->dram_lsb_ptr = cpu_to_le32(scratch_phys);
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- tx->dram_msb_ptr = iwl4965_get_dma_hi_address(scratch_phys);
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+ tx->dram_msb_ptr = iwl_get_dma_hi_address(scratch_phys);
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/* Hard coded to start at the highest retry fallback position
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/* Hard coded to start at the highest retry fallback position
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* until the 4965 specific rate control algorithm is tied in */
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* until the 4965 specific rate control algorithm is tied in */
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