|
@@ -514,18 +514,18 @@ qh_urb_transaction (
|
|
|
qtd->urb = urb;
|
|
|
qtd_prev->hw_next = QTD_NEXT (qtd->qtd_dma);
|
|
|
list_add_tail (&qtd->qtd_list, head);
|
|
|
+
|
|
|
+ /* for zero length DATA stages, STATUS is always IN */
|
|
|
+ if (len == 0)
|
|
|
+ token |= (1 /* "in" */ << 8);
|
|
|
}
|
|
|
|
|
|
/*
|
|
|
* data transfer stage: buffer setup
|
|
|
*/
|
|
|
- if (likely (len > 0))
|
|
|
- buf = urb->transfer_dma;
|
|
|
- else
|
|
|
- buf = 0;
|
|
|
+ buf = urb->transfer_dma;
|
|
|
|
|
|
- /* for zero length DATA stages, STATUS is always IN */
|
|
|
- if (!buf || is_input)
|
|
|
+ if (is_input)
|
|
|
token |= (1 /* "in" */ << 8);
|
|
|
/* else it's already initted to "out" pid (0 << 8) */
|
|
|
|
|
@@ -572,7 +572,7 @@ qh_urb_transaction (
|
|
|
* control requests may need a terminating data "status" ack;
|
|
|
* bulk ones may need a terminating short packet (zero length).
|
|
|
*/
|
|
|
- if (likely (buf != 0)) {
|
|
|
+ if (likely (urb->transfer_buffer_length != 0)) {
|
|
|
int one_more = 0;
|
|
|
|
|
|
if (usb_pipecontrol (urb->pipe)) {
|