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@@ -0,0 +1,393 @@
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+/*
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+ * Analog devices AD5764, AD5764R, AD5744, AD5744R quad-channel
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+ * Digital to Analog Converters driver
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+ *
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+ * Copyright 2011 Analog Devices Inc.
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+ *
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+ * Licensed under the GPL-2.
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+ */
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+
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+#include <linux/device.h>
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+#include <linux/err.h>
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+#include <linux/module.h>
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+#include <linux/kernel.h>
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+#include <linux/spi/spi.h>
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+#include <linux/slab.h>
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+#include <linux/sysfs.h>
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+#include <linux/regulator/consumer.h>
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+
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+#include "../iio.h"
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+#include "../sysfs.h"
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+#include "dac.h"
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+
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+#define AD5764_REG_SF_NOP 0x0
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+#define AD5764_REG_SF_CONFIG 0x1
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+#define AD5764_REG_SF_CLEAR 0x4
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+#define AD5764_REG_SF_LOAD 0x5
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+#define AD5764_REG_DATA(x) ((2 << 3) | (x))
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+#define AD5764_REG_COARSE_GAIN(x) ((3 << 3) | (x))
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+#define AD5764_REG_FINE_GAIN(x) ((4 << 3) | (x))
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+#define AD5764_REG_OFFSET(x) ((5 << 3) | (x))
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+
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+#define AD5764_NUM_CHANNELS 4
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+
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+/**
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+ * struct ad5764_chip_info - chip specific information
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+ * @int_vref: Value of the internal reference voltage in uV - 0 if external
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+ * reference voltage is used
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+ * @channel channel specification
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+*/
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+
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+struct ad5764_chip_info {
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+ unsigned long int_vref;
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+ const struct iio_chan_spec *channels;
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+};
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+
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+/**
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+ * struct ad5764_state - driver instance specific data
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+ * @spi: spi_device
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+ * @chip_info: chip info
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+ * @vref_reg: vref supply regulators
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+ * @data: spi transfer buffers
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+ */
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+
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+struct ad5764_state {
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+ struct spi_device *spi;
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+ const struct ad5764_chip_info *chip_info;
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+ struct regulator_bulk_data vref_reg[2];
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+
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+ /*
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+ * DMA (thus cache coherency maintenance) requires the
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+ * transfer buffers to live in their own cache lines.
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+ */
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+ union {
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+ __be32 d32;
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+ u8 d8[4];
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+ } data[2] ____cacheline_aligned;
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+};
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+
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+enum ad5764_type {
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+ ID_AD5744,
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+ ID_AD5744R,
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+ ID_AD5764,
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+ ID_AD5764R,
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+};
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+
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+#define AD5764_CHANNEL(_chan, _bits) { \
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+ .type = IIO_VOLTAGE, \
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+ .indexed = 1, \
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+ .output = 1, \
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+ .channel = (_chan), \
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+ .address = (_chan), \
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+ .info_mask = IIO_CHAN_INFO_OFFSET_SHARED_BIT | \
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+ IIO_CHAN_INFO_SCALE_SEPARATE_BIT | \
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+ IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT | \
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+ IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT, \
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+ .scan_type = IIO_ST('u', (_bits), 16, 16 - (_bits)) \
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+}
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+
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+#define DECLARE_AD5764_CHANNELS(_name, _bits) \
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+const struct iio_chan_spec _name##_channels[] = { \
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+ AD5764_CHANNEL(0, (_bits)), \
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+ AD5764_CHANNEL(1, (_bits)), \
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+ AD5764_CHANNEL(2, (_bits)), \
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+ AD5764_CHANNEL(3, (_bits)), \
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+};
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+
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+static DECLARE_AD5764_CHANNELS(ad5764, 16);
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+static DECLARE_AD5764_CHANNELS(ad5744, 14);
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+
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+static const struct ad5764_chip_info ad5764_chip_infos[] = {
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+ [ID_AD5744] = {
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+ .int_vref = 0,
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+ .channels = ad5744_channels,
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+ },
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+ [ID_AD5744R] = {
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+ .int_vref = 5000000,
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+ .channels = ad5744_channels,
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+ },
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+ [ID_AD5764] = {
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+ .int_vref = 0,
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+ .channels = ad5764_channels,
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+ },
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+ [ID_AD5764R] = {
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+ .int_vref = 5000000,
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+ .channels = ad5764_channels,
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+ },
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+};
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+
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+static int ad5764_write(struct iio_dev *indio_dev, unsigned int reg,
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+ unsigned int val)
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+{
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+ struct ad5764_state *st = iio_priv(indio_dev);
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+ int ret;
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+
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+ mutex_lock(&indio_dev->mlock);
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+ st->data[0].d32 = cpu_to_be32((reg << 16) | val);
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+
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+ ret = spi_write(st->spi, &st->data[0].d8[1], 3);
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+ mutex_unlock(&indio_dev->mlock);
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+
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+ return ret;
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+}
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+
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+static int ad5764_read(struct iio_dev *indio_dev, unsigned int reg,
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+ unsigned int *val)
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+{
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+ struct ad5764_state *st = iio_priv(indio_dev);
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+ struct spi_message m;
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+ int ret;
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+ struct spi_transfer t[] = {
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+ {
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+ .tx_buf = &st->data[0].d8[1],
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+ .len = 3,
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+ .cs_change = 1,
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+ }, {
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+ .rx_buf = &st->data[1].d8[1],
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+ .len = 3,
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+ },
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+ };
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+
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+ spi_message_init(&m);
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+ spi_message_add_tail(&t[0], &m);
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+ spi_message_add_tail(&t[1], &m);
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+
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+ mutex_lock(&indio_dev->mlock);
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+
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+ st->data[0].d32 = cpu_to_be32((1 << 23) | (reg << 16));
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+
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+ ret = spi_sync(st->spi, &m);
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+ if (ret >= 0)
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+ *val = be32_to_cpu(st->data[1].d32) & 0xffff;
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+
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+ mutex_unlock(&indio_dev->mlock);
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+
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+ return ret;
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+}
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+
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+static int ad5764_chan_info_to_reg(struct iio_chan_spec const *chan, long info)
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+{
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+ switch (info) {
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+ case 0:
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+ return AD5764_REG_DATA(chan->address);
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+ case IIO_CHAN_INFO_CALIBBIAS:
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+ return AD5764_REG_OFFSET(chan->address);
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+ case IIO_CHAN_INFO_CALIBSCALE:
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+ return AD5764_REG_FINE_GAIN(chan->address);
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+ default:
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+ break;
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+ }
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+
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+ return 0;
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+}
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+
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+static int ad5764_write_raw(struct iio_dev *indio_dev,
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+ struct iio_chan_spec const *chan, int val, int val2, long info)
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+{
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+ const int max_val = (1 << chan->scan_type.realbits);
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+ unsigned int reg;
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+
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+ switch (info) {
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+ case 0:
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+ if (val >= max_val || val < 0)
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+ return -EINVAL;
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+ val <<= chan->scan_type.shift;
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+ break;
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+ case IIO_CHAN_INFO_CALIBBIAS:
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+ if (val >= 128 || val < -128)
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+ return -EINVAL;
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+ break;
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+ case IIO_CHAN_INFO_CALIBSCALE:
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+ if (val >= 32 || val < -32)
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+ return -EINVAL;
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+ break;
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+ default:
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+ return -EINVAL;
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+ }
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+
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+ reg = ad5764_chan_info_to_reg(chan, info);
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+ return ad5764_write(indio_dev, reg, (u16)val);
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+}
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+
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+static int ad5764_get_channel_vref(struct ad5764_state *st,
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+ unsigned int channel)
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+{
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+ if (st->chip_info->int_vref)
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+ return st->chip_info->int_vref;
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+ else
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+ return regulator_get_voltage(st->vref_reg[channel / 2].consumer);
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+}
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+
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+static int ad5764_read_raw(struct iio_dev *indio_dev,
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+ struct iio_chan_spec const *chan, int *val, int *val2, long info)
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+{
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+ struct ad5764_state *st = iio_priv(indio_dev);
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+ unsigned long scale_uv;
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+ unsigned int reg;
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+ int vref;
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+ int ret;
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+
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+ switch (info) {
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+ case 0:
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+ reg = AD5764_REG_DATA(chan->address);
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+ ret = ad5764_read(indio_dev, reg, val);
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+ if (ret < 0)
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+ return ret;
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+ *val >>= chan->scan_type.shift;
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+ return IIO_VAL_INT;
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+ case IIO_CHAN_INFO_CALIBBIAS:
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+ reg = AD5764_REG_OFFSET(chan->address);
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+ ret = ad5764_read(indio_dev, reg, val);
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+ if (ret < 0)
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+ return ret;
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+ *val = sign_extend32(*val, 7);
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+ return IIO_VAL_INT;
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+ case IIO_CHAN_INFO_CALIBSCALE:
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+ reg = AD5764_REG_FINE_GAIN(chan->address);
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+ ret = ad5764_read(indio_dev, reg, val);
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+ if (ret < 0)
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+ return ret;
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+ *val = sign_extend32(*val, 5);
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+ return IIO_VAL_INT;
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+ case IIO_CHAN_INFO_SCALE:
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+ /* vout = 4 * vref + ((dac_code / 65535) - 0.5) */
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+ vref = ad5764_get_channel_vref(st, chan->channel);
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+ if (vref < 0)
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+ return vref;
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+
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+ scale_uv = (vref * 4 * 100) >> chan->scan_type.realbits;
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+ *val = scale_uv / 100000;
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+ *val2 = (scale_uv % 100000) * 10;
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+ return IIO_VAL_INT_PLUS_MICRO;
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+ case IIO_CHAN_INFO_OFFSET:
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+ *val = -(1 << chan->scan_type.realbits) / 2;
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+ return IIO_VAL_INT;
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+ }
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+
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+ return -EINVAL;
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+}
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+
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+static const struct iio_info ad5764_info = {
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+ .read_raw = ad5764_read_raw,
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+ .write_raw = ad5764_write_raw,
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+ .driver_module = THIS_MODULE,
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+};
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+
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+static int __devinit ad5764_probe(struct spi_device *spi)
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+{
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+ enum ad5764_type type = spi_get_device_id(spi)->driver_data;
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+ struct iio_dev *indio_dev;
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+ struct ad5764_state *st;
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+ int ret;
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+
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+ indio_dev = iio_allocate_device(sizeof(*st));
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+ if (indio_dev == NULL) {
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+ dev_err(&spi->dev, "Failed to allocate iio device\n");
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+ return -ENOMEM;
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+ }
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+
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+ st = iio_priv(indio_dev);
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+ spi_set_drvdata(spi, indio_dev);
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+
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+ st->spi = spi;
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+ st->chip_info = &ad5764_chip_infos[type];
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+
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+ indio_dev->dev.parent = &spi->dev;
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+ indio_dev->name = spi_get_device_id(spi)->name;
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+ indio_dev->info = &ad5764_info;
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+ indio_dev->modes = INDIO_DIRECT_MODE;
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+ indio_dev->num_channels = AD5764_NUM_CHANNELS;
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+ indio_dev->channels = st->chip_info->channels;
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+
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+ if (st->chip_info->int_vref == 0) {
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+ st->vref_reg[0].supply = "vrefAB";
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+ st->vref_reg[1].supply = "vrefCD";
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+
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+ ret = regulator_bulk_get(&st->spi->dev,
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+ ARRAY_SIZE(st->vref_reg), st->vref_reg);
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+ if (ret) {
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+ dev_err(&spi->dev, "Failed to request vref regulators: %d\n",
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+ ret);
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+ goto error_free;
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+ }
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+
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+ ret = regulator_bulk_enable(ARRAY_SIZE(st->vref_reg),
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+ st->vref_reg);
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+ if (ret) {
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+ dev_err(&spi->dev, "Failed to enable vref regulators: %d\n",
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+ ret);
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+ goto error_free_reg;
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+ }
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+ }
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+
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+ ret = iio_device_register(indio_dev);
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+ if (ret) {
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+ dev_err(&spi->dev, "Failed to register iio device: %d\n", ret);
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+ goto error_disable_reg;
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+ }
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+
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+ return 0;
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+
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+error_disable_reg:
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+ if (st->chip_info->int_vref == 0)
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+ regulator_bulk_disable(ARRAY_SIZE(st->vref_reg), st->vref_reg);
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+error_free_reg:
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+ if (st->chip_info->int_vref == 0)
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+ regulator_bulk_free(ARRAY_SIZE(st->vref_reg), st->vref_reg);
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+error_free:
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+ iio_free_device(indio_dev);
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+
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+ return ret;
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+}
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+
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+static int __devexit ad5764_remove(struct spi_device *spi)
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+{
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+ struct iio_dev *indio_dev = spi_get_drvdata(spi);
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+ struct ad5764_state *st = iio_priv(indio_dev);
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+
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+ iio_device_unregister(indio_dev);
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+
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+ if (st->chip_info->int_vref == 0) {
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+ regulator_bulk_disable(ARRAY_SIZE(st->vref_reg), st->vref_reg);
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+ regulator_bulk_free(ARRAY_SIZE(st->vref_reg), st->vref_reg);
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+ }
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+
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+ iio_free_device(indio_dev);
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+
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+ return 0;
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+}
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+
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+static const struct spi_device_id ad5764_ids[] = {
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+ { "ad5744", ID_AD5744 },
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+ { "ad5744r", ID_AD5744R },
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+ { "ad5764", ID_AD5764 },
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+ { "ad5764r", ID_AD5764R },
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+ { }
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+};
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+MODULE_DEVICE_TABLE(spi, ad5764_ids);
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+
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+static struct spi_driver ad5764_driver = {
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+ .driver = {
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+ .name = "ad5764",
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+ .owner = THIS_MODULE,
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+ },
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+ .probe = ad5764_probe,
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+ .remove = __devexit_p(ad5764_remove),
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+ .id_table = ad5764_ids,
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+};
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+
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+static int __init ad5764_spi_init(void)
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+{
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+ return spi_register_driver(&ad5764_driver);
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+}
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+module_init(ad5764_spi_init);
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+
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+static void __exit ad5764_spi_exit(void)
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+{
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+ spi_unregister_driver(&ad5764_driver);
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+}
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+module_exit(ad5764_spi_exit);
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+
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+MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
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+MODULE_DESCRIPTION("Analog Devices AD5744/AD5744R/AD5764/AD5764R DAC");
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+MODULE_LICENSE("GPL v2");
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