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@@ -220,6 +220,7 @@ struct x86_pmu {
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struct perf_event *event);
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struct event_constraint *event_constraints;
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void (*quirks)(void);
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+ int perfctr_second_write;
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int (*cpu_prepare)(int cpu);
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void (*cpu_starting)(int cpu);
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@@ -925,8 +926,17 @@ x86_perf_event_set_period(struct perf_event *event)
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*/
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atomic64_set(&hwc->prev_count, (u64)-left);
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- wrmsrl(hwc->event_base + idx,
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+ wrmsrl(hwc->event_base + idx, (u64)(-left) & x86_pmu.cntval_mask);
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+
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+ /*
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+ * Due to erratum on certan cpu we need
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+ * a second write to be sure the register
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+ * is updated properly
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+ */
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+ if (x86_pmu.perfctr_second_write) {
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+ wrmsrl(hwc->event_base + idx,
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(u64)(-left) & x86_pmu.cntval_mask);
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+ }
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perf_event_update_userpage(event);
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