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@@ -56,17 +56,16 @@ static struct pll_min_max plls[PLLS_MAX] = {
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6, 16, 3, 16,
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4, 128, 0, 31,
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930000, 1400000, 165000, 48000,
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- 4, 2 }, //I8xx
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+ 4, 2 }, /* I8xx */
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{ 75, 120, 10, 20,
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5, 9, 4, 7,
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5, 80, 1, 8,
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1400000, 2800000, 200000, 96000,
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- 10, 5 } //I9xx
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+ 10, 5 } /* I9xx */
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};
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-int
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-intelfbhw_get_chipset(struct pci_dev *pdev, struct intelfb_info *dinfo)
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+int intelfbhw_get_chipset(struct pci_dev *pdev, struct intelfb_info *dinfo)
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{
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u32 tmp;
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if (!pdev || !dinfo)
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@@ -149,9 +148,8 @@ intelfbhw_get_chipset(struct pci_dev *pdev, struct intelfb_info *dinfo)
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}
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}
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-int
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-intelfbhw_get_memory(struct pci_dev *pdev, int *aperture_size,
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- int *stolen_size)
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+int intelfbhw_get_memory(struct pci_dev *pdev, int *aperture_size,
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+ int *stolen_size)
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{
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struct pci_dev *bridge_dev;
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u16 tmp;
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@@ -254,8 +252,7 @@ intelfbhw_get_memory(struct pci_dev *pdev, int *aperture_size,
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}
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}
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-int
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-intelfbhw_check_non_crt(struct intelfb_info *dinfo)
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+int intelfbhw_check_non_crt(struct intelfb_info *dinfo)
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{
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int dvo = 0;
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@@ -271,8 +268,7 @@ intelfbhw_check_non_crt(struct intelfb_info *dinfo)
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return dvo;
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}
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-const char *
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-intelfbhw_dvo_to_string(int dvo)
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+const char * intelfbhw_dvo_to_string(int dvo)
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{
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if (dvo & DVOA_PORT)
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return "DVO port A";
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@@ -287,9 +283,8 @@ intelfbhw_dvo_to_string(int dvo)
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}
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-int
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-intelfbhw_validate_mode(struct intelfb_info *dinfo,
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- struct fb_var_screeninfo *var)
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+int intelfbhw_validate_mode(struct intelfb_info *dinfo,
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+ struct fb_var_screeninfo *var)
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{
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int bytes_per_pixel;
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int tmp;
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@@ -345,8 +340,7 @@ intelfbhw_validate_mode(struct intelfb_info *dinfo,
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return 0;
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}
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-int
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-intelfbhw_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)
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+int intelfbhw_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)
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{
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struct intelfb_info *dinfo = GET_DINFO(info);
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u32 offset, xoffset, yoffset;
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@@ -368,9 +362,10 @@ intelfbhw_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)
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offset += dinfo->fb.offset << 12;
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dinfo->vsync.pan_offset = offset;
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- if ((var->activate & FB_ACTIVATE_VBL) && !intelfbhw_enable_irq(dinfo, 0)) {
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+ if ((var->activate & FB_ACTIVATE_VBL) &&
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+ !intelfbhw_enable_irq(dinfo, 0))
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dinfo->vsync.pan_display = 1;
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- } else {
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+ else {
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dinfo->vsync.pan_display = 0;
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OUTREG(DSPABASE, offset);
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}
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@@ -379,8 +374,7 @@ intelfbhw_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)
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}
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/* Blank the screen. */
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-void
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-intelfbhw_do_blank(int blank, struct fb_info *info)
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+void intelfbhw_do_blank(int blank, struct fb_info *info)
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{
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struct intelfb_info *dinfo = GET_DINFO(info);
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u32 tmp;
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@@ -405,11 +399,10 @@ intelfbhw_do_blank(int blank, struct fb_info *info)
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DBG_MSG("cursor_on is %d\n", dinfo->cursor_on);
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#endif
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if (dinfo->cursor_on) {
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- if (blank) {
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+ if (blank)
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intelfbhw_cursor_hide(dinfo);
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- } else {
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+ else
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intelfbhw_cursor_show(dinfo);
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- }
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dinfo->cursor_on = 1;
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}
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dinfo->cursor_blanked = blank;
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@@ -437,10 +430,9 @@ intelfbhw_do_blank(int blank, struct fb_info *info)
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}
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-void
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-intelfbhw_setcolreg(struct intelfb_info *dinfo, unsigned regno,
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- unsigned red, unsigned green, unsigned blue,
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- unsigned transp)
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+void intelfbhw_setcolreg(struct intelfb_info *dinfo, unsigned regno,
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+ unsigned red, unsigned green, unsigned blue,
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+ unsigned transp)
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{
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#if VERBOSE > 0
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DBG_MSG("intelfbhw_setcolreg: %d: (%d, %d, %d)\n",
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@@ -457,9 +449,8 @@ intelfbhw_setcolreg(struct intelfb_info *dinfo, unsigned regno,
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}
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-int
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-intelfbhw_read_hw_state(struct intelfb_info *dinfo, struct intelfb_hwstate *hw,
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- int flag)
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+int intelfbhw_read_hw_state(struct intelfb_info *dinfo,
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+ struct intelfb_hwstate *hw, int flag)
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{
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int i;
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@@ -606,7 +597,8 @@ static int calc_vclock3(int index, int m, int n, int p)
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return plls[index].ref_clk * m / n / p;
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}
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-static int calc_vclock(int index, int m1, int m2, int n, int p1, int p2, int lvds)
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+static int calc_vclock(int index, int m1, int m2, int n, int p1, int p2,
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+ int lvds)
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{
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struct pll_min_max *pll = &plls[index];
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u32 m, vco, p;
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@@ -615,17 +607,16 @@ static int calc_vclock(int index, int m1, int m2, int n, int p1, int p2, int lvd
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n += 2;
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vco = pll->ref_clk * m / n;
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- if (index == PLLS_I8xx) {
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+ if (index == PLLS_I8xx)
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p = ((p1 + 2) * (1 << (p2 + 1)));
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- } else {
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+ else
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p = ((p1) * (p2 ? 5 : 10));
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- }
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return vco / p;
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}
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#if REGDUMP
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-static void
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-intelfbhw_get_p1p2(struct intelfb_info *dinfo, int dpll, int *o_p1, int *o_p2)
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+static void intelfbhw_get_p1p2(struct intelfb_info *dinfo, int dpll,
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+ int *o_p1, int *o_p2)
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{
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int p1, p2;
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@@ -634,7 +625,7 @@ intelfbhw_get_p1p2(struct intelfb_info *dinfo, int dpll, int *o_p1, int *o_p2)
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p1 = 1;
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else
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p1 = (dpll >> DPLL_P1_SHIFT) & 0xff;
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-
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+
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p1 = ffs(p1);
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p2 = (dpll >> DPLL_I9XX_P2_SHIFT) & DPLL_P2_MASK;
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@@ -652,8 +643,8 @@ intelfbhw_get_p1p2(struct intelfb_info *dinfo, int dpll, int *o_p1, int *o_p2)
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#endif
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-void
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-intelfbhw_print_hw_state(struct intelfb_info *dinfo, struct intelfb_hwstate *hw)
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+void intelfbhw_print_hw_state(struct intelfb_info *dinfo,
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+ struct intelfb_hwstate *hw)
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{
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#if REGDUMP
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int i, m1, m2, n, p1, p2;
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@@ -666,7 +657,7 @@ intelfbhw_print_hw_state(struct intelfb_info *dinfo, struct intelfb_hwstate *hw)
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printk("hw state dump start\n");
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printk(" VGA0_DIVISOR: 0x%08x\n", hw->vga0_divisor);
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printk(" VGA1_DIVISOR: 0x%08x\n", hw->vga1_divisor);
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- printk(" VGAPD: 0x%08x\n", hw->vga_pd);
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+ printk(" VGAPD: 0x%08x\n", hw->vga_pd);
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n = (hw->vga0_divisor >> FP_N_DIVISOR_SHIFT) & FP_DIVISOR_MASK;
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m1 = (hw->vga0_divisor >> FP_M1_DIVISOR_SHIFT) & FP_DIVISOR_MASK;
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m2 = (hw->vga0_divisor >> FP_M2_DIVISOR_SHIFT) & FP_DIVISOR_MASK;
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@@ -685,7 +676,8 @@ intelfbhw_print_hw_state(struct intelfb_info *dinfo, struct intelfb_hwstate *hw)
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intelfbhw_get_p1p2(dinfo, hw->vga_pd, &p1, &p2);
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printk(" VGA1: (m1, m2, n, p1, p2) = (%d, %d, %d, %d, %d)\n",
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m1, m2, n, p1, p2);
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- printk(" VGA1: clock is %d\n", calc_vclock(index, m1, m2, n, p1, p2, 0));
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+ printk(" VGA1: clock is %d\n",
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+ calc_vclock(index, m1, m2, n, p1, p2, 0));
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printk(" DPLL_A: 0x%08x\n", hw->dpll_a);
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printk(" DPLL_B: 0x%08x\n", hw->dpll_b);
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@@ -702,7 +694,8 @@ intelfbhw_print_hw_state(struct intelfb_info *dinfo, struct intelfb_hwstate *hw)
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printk(" PLLA0: (m1, m2, n, p1, p2) = (%d, %d, %d, %d, %d)\n",
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m1, m2, n, p1, p2);
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- printk(" PLLA0: clock is %d\n", calc_vclock(index, m1, m2, n, p1, p2, 0));
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+ printk(" PLLA0: clock is %d\n",
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+ calc_vclock(index, m1, m2, n, p1, p2, 0));
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n = (hw->fpa1 >> FP_N_DIVISOR_SHIFT) & FP_DIVISOR_MASK;
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m1 = (hw->fpa1 >> FP_M1_DIVISOR_SHIFT) & FP_DIVISOR_MASK;
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@@ -712,7 +705,8 @@ intelfbhw_print_hw_state(struct intelfb_info *dinfo, struct intelfb_hwstate *hw)
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printk(" PLLA1: (m1, m2, n, p1, p2) = (%d, %d, %d, %d, %d)\n",
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m1, m2, n, p1, p2);
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- printk(" PLLA1: clock is %d\n", calc_vclock(index, m1, m2, n, p1, p2, 0));
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+ printk(" PLLA1: clock is %d\n",
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+ calc_vclock(index, m1, m2, n, p1, p2, 0));
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#if 0
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printk(" PALETTE_A:\n");
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@@ -817,8 +811,8 @@ intelfbhw_print_hw_state(struct intelfb_info *dinfo, struct intelfb_hwstate *hw)
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/* Split the M parameter into M1 and M2. */
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-static int
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-splitm(int index, unsigned int m, unsigned int *retm1, unsigned int *retm2)
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+static int splitm(int index, unsigned int m, unsigned int *retm1,
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+ unsigned int *retm2)
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{
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int m1, m2;
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int testm;
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@@ -839,8 +833,8 @@ splitm(int index, unsigned int m, unsigned int *retm1, unsigned int *retm2)
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}
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/* Split the P parameter into P1 and P2. */
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-static int
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-splitp(int index, unsigned int p, unsigned int *retp1, unsigned int *retp2)
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+static int splitp(int index, unsigned int p, unsigned int *retp1,
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+ unsigned int *retp2)
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{
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int p1, p2;
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struct pll_min_max *pll = &plls[index];
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@@ -874,9 +868,8 @@ splitp(int index, unsigned int p, unsigned int *retp1, unsigned int *retp2)
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}
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}
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-static int
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-calc_pll_params(int index, int clock, u32 *retm1, u32 *retm2, u32 *retn, u32 *retp1,
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- u32 *retp2, u32 *retclock)
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+static int calc_pll_params(int index, int clock, u32 *retm1, u32 *retm2,
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+ u32 *retn, u32 *retp1, u32 *retp2, u32 *retclock)
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{
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u32 m1, m2, n, p1, p2, n1, testm;
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u32 f_vco, p, p_best = 0, m, f_out = 0;
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@@ -971,8 +964,8 @@ calc_pll_params(int index, int clock, u32 *retm1, u32 *retm2, u32 *retn, u32 *re
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return 0;
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}
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-static __inline__ int
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-check_overflow(u32 value, u32 limit, const char *description)
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+static __inline__ int check_overflow(u32 value, u32 limit,
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+ const char *description)
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{
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if (value > limit) {
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WRN_MSG("%s value %d exceeds limit %d\n",
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@@ -983,9 +976,9 @@ check_overflow(u32 value, u32 limit, const char *description)
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}
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/* It is assumed that hw is filled in with the initial state information. */
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-int
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-intelfbhw_mode_to_hw(struct intelfb_info *dinfo, struct intelfb_hwstate *hw,
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- struct fb_var_screeninfo *var)
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+int intelfbhw_mode_to_hw(struct intelfb_info *dinfo,
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+ struct intelfb_hwstate *hw,
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+ struct fb_var_screeninfo *var)
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{
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int pipe = PIPE_A;
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u32 *dpll, *fp0, *fp1;
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@@ -1089,9 +1082,8 @@ intelfbhw_mode_to_hw(struct intelfb_info *dinfo, struct intelfb_hwstate *hw,
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if (IS_I9XX(dinfo)) {
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*dpll |= (p2 << DPLL_I9XX_P2_SHIFT);
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*dpll |= (1 << (p1 - 1)) << DPLL_P1_SHIFT;
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- } else {
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+ } else
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*dpll |= (p2 << DPLL_P2_SHIFT) | (p1 << DPLL_P1_SHIFT);
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- }
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*fp0 = (n << FP_N_DIVISOR_SHIFT) |
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(m1 << FP_M1_DIVISOR_SHIFT) |
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@@ -1226,9 +1218,8 @@ intelfbhw_mode_to_hw(struct intelfb_info *dinfo, struct intelfb_hwstate *hw,
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}
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/* Program a (non-VGA) video mode. */
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-int
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-intelfbhw_program_mode(struct intelfb_info *dinfo,
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- const struct intelfb_hwstate *hw, int blank)
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+int intelfbhw_program_mode(struct intelfb_info *dinfo,
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+ const struct intelfb_hwstate *hw, int blank)
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{
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int pipe = PIPE_A;
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u32 tmp;
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@@ -1324,7 +1315,7 @@ intelfbhw_program_mode(struct intelfb_info *dinfo,
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tmp &= ~PIPECONF_ENABLE;
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OUTREG(pipe_conf_reg, tmp);
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}
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- } while(count < 2000);
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+ } while (count < 2000);
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OUTREG(ADPA, INREG(ADPA) & ~ADPA_DAC_ENABLE);
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@@ -1448,8 +1439,7 @@ static u32 get_ring_space(struct intelfb_info *dinfo)
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return ring_space;
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}
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-static int
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-wait_ring(struct intelfb_info *dinfo, int n)
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+static int wait_ring(struct intelfb_info *dinfo, int n)
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{
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int i = 0;
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unsigned long end;
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@@ -1491,16 +1481,15 @@ wait_ring(struct intelfb_info *dinfo, int n)
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return i;
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}
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-static void
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-do_flush(struct intelfb_info *dinfo) {
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+static void do_flush(struct intelfb_info *dinfo)
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+{
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START_RING(2);
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OUT_RING(MI_FLUSH | MI_WRITE_DIRTY_STATE | MI_INVALIDATE_MAP_CACHE);
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OUT_RING(MI_NOOP);
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ADVANCE_RING();
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}
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-void
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-intelfbhw_do_sync(struct intelfb_info *dinfo)
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+void intelfbhw_do_sync(struct intelfb_info *dinfo)
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{
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#if VERBOSE > 0
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DBG_MSG("intelfbhw_do_sync\n");
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@@ -1519,8 +1508,7 @@ intelfbhw_do_sync(struct intelfb_info *dinfo)
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dinfo->ring_space = dinfo->ring.size - RING_MIN_FREE;
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}
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-static void
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-refresh_ring(struct intelfb_info *dinfo)
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+static void refresh_ring(struct intelfb_info *dinfo)
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{
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#if VERBOSE > 0
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DBG_MSG("refresh_ring\n");
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@@ -1531,8 +1519,7 @@ refresh_ring(struct intelfb_info *dinfo)
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dinfo->ring_space = get_ring_space(dinfo);
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}
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-static void
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-reset_state(struct intelfb_info *dinfo)
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+static void reset_state(struct intelfb_info *dinfo)
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{
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int i;
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u32 tmp;
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@@ -1562,12 +1549,11 @@ reset_state(struct intelfb_info *dinfo)
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}
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/* Stop the 2D engine, and turn off the ring buffer. */
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-void
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-intelfbhw_2d_stop(struct intelfb_info *dinfo)
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+void intelfbhw_2d_stop(struct intelfb_info *dinfo)
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{
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#if VERBOSE > 0
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- DBG_MSG("intelfbhw_2d_stop: accel: %d, ring_active: %d\n", dinfo->accel,
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- dinfo->ring_active);
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+ DBG_MSG("intelfbhw_2d_stop: accel: %d, ring_active: %d\n",
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+ dinfo->accel, dinfo->ring_active);
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#endif
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if (!dinfo->accel)
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@@ -1582,8 +1568,7 @@ intelfbhw_2d_stop(struct intelfb_info *dinfo)
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* It is assumed that the graphics engine has been stopped by previously
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* calling intelfb_2d_stop().
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*/
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-void
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-intelfbhw_2d_start(struct intelfb_info *dinfo)
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+void intelfbhw_2d_start(struct intelfb_info *dinfo)
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{
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#if VERBOSE > 0
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DBG_MSG("intelfbhw_2d_start: accel: %d, ring_active: %d\n",
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@@ -1607,9 +1592,8 @@ intelfbhw_2d_start(struct intelfb_info *dinfo)
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}
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|
|
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/* 2D fillrect (solid fill or invert) */
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-void
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-intelfbhw_do_fillrect(struct intelfb_info *dinfo, u32 x, u32 y, u32 w, u32 h,
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- u32 color, u32 pitch, u32 bpp, u32 rop)
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|
+void intelfbhw_do_fillrect(struct intelfb_info *dinfo, u32 x, u32 y, u32 w,
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|
+ u32 h, u32 color, u32 pitch, u32 bpp, u32 rop)
|
|
|
{
|
|
|
u32 br00, br09, br13, br14, br16;
|
|
|
|
|
@@ -1698,9 +1682,9 @@ intelfbhw_do_bitblt(struct intelfb_info *dinfo, u32 curx, u32 cury,
|
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|
ADVANCE_RING();
|
|
|
}
|
|
|
|
|
|
-int
|
|
|
-intelfbhw_do_drawglyph(struct intelfb_info *dinfo, u32 fg, u32 bg, u32 w,
|
|
|
- u32 h, const u8* cdat, u32 x, u32 y, u32 pitch, u32 bpp)
|
|
|
+int intelfbhw_do_drawglyph(struct intelfb_info *dinfo, u32 fg, u32 bg, u32 w,
|
|
|
+ u32 h, const u8* cdat, u32 x, u32 y, u32 pitch,
|
|
|
+ u32 bpp)
|
|
|
{
|
|
|
int nbytes, ndwords, pad, tmp;
|
|
|
u32 br00, br09, br13, br18, br19, br22, br23;
|
|
@@ -1787,8 +1771,7 @@ intelfbhw_do_drawglyph(struct intelfb_info *dinfo, u32 fg, u32 bg, u32 w,
|
|
|
}
|
|
|
|
|
|
/* HW cursor functions. */
|
|
|
-void
|
|
|
-intelfbhw_cursor_init(struct intelfb_info *dinfo)
|
|
|
+void intelfbhw_cursor_init(struct intelfb_info *dinfo)
|
|
|
{
|
|
|
u32 tmp;
|
|
|
|
|
@@ -1819,8 +1802,7 @@ intelfbhw_cursor_init(struct intelfb_info *dinfo)
|
|
|
}
|
|
|
}
|
|
|
|
|
|
-void
|
|
|
-intelfbhw_cursor_hide(struct intelfb_info *dinfo)
|
|
|
+void intelfbhw_cursor_hide(struct intelfb_info *dinfo)
|
|
|
{
|
|
|
u32 tmp;
|
|
|
|
|
@@ -1845,8 +1827,7 @@ intelfbhw_cursor_hide(struct intelfb_info *dinfo)
|
|
|
}
|
|
|
}
|
|
|
|
|
|
-void
|
|
|
-intelfbhw_cursor_show(struct intelfb_info *dinfo)
|
|
|
+void intelfbhw_cursor_show(struct intelfb_info *dinfo)
|
|
|
{
|
|
|
u32 tmp;
|
|
|
|
|
@@ -1875,8 +1856,7 @@ intelfbhw_cursor_show(struct intelfb_info *dinfo)
|
|
|
}
|
|
|
}
|
|
|
|
|
|
-void
|
|
|
-intelfbhw_cursor_setpos(struct intelfb_info *dinfo, int x, int y)
|
|
|
+void intelfbhw_cursor_setpos(struct intelfb_info *dinfo, int x, int y)
|
|
|
{
|
|
|
u32 tmp;
|
|
|
|
|
@@ -1894,13 +1874,11 @@ intelfbhw_cursor_setpos(struct intelfb_info *dinfo, int x, int y)
|
|
|
((y & CURSOR_POS_MASK) << CURSOR_Y_SHIFT);
|
|
|
OUTREG(CURSOR_A_POSITION, tmp);
|
|
|
|
|
|
- if (IS_I9XX(dinfo)) {
|
|
|
+ if (IS_I9XX(dinfo))
|
|
|
OUTREG(CURSOR_A_BASEADDR, dinfo->cursor.physical);
|
|
|
- }
|
|
|
}
|
|
|
|
|
|
-void
|
|
|
-intelfbhw_cursor_setcolor(struct intelfb_info *dinfo, u32 bg, u32 fg)
|
|
|
+void intelfbhw_cursor_setcolor(struct intelfb_info *dinfo, u32 bg, u32 fg)
|
|
|
{
|
|
|
#if VERBOSE > 0
|
|
|
DBG_MSG("intelfbhw_cursor_setcolor\n");
|
|
@@ -1912,9 +1890,8 @@ intelfbhw_cursor_setcolor(struct intelfb_info *dinfo, u32 bg, u32 fg)
|
|
|
OUTREG(CURSOR_A_PALETTE3, bg & CURSOR_PALETTE_MASK);
|
|
|
}
|
|
|
|
|
|
-void
|
|
|
-intelfbhw_cursor_load(struct intelfb_info *dinfo, int width, int height,
|
|
|
- u8 *data)
|
|
|
+void intelfbhw_cursor_load(struct intelfb_info *dinfo, int width, int height,
|
|
|
+ u8 *data)
|
|
|
{
|
|
|
u8 __iomem *addr = (u8 __iomem *)dinfo->cursor.virtual;
|
|
|
int i, j, w = width / 8;
|
|
@@ -1942,8 +1919,8 @@ intelfbhw_cursor_load(struct intelfb_info *dinfo, int width, int height,
|
|
|
}
|
|
|
}
|
|
|
|
|
|
-void
|
|
|
-intelfbhw_cursor_reset(struct intelfb_info *dinfo) {
|
|
|
+void intelfbhw_cursor_reset(struct intelfb_info *dinfo)
|
|
|
+{
|
|
|
u8 __iomem *addr = (u8 __iomem *)dinfo->cursor.virtual;
|
|
|
int i, j;
|
|
|
|
|
@@ -2047,8 +2024,8 @@ intelfbhw_disable_irq(struct intelfb_info *dinfo) {
|
|
|
}
|
|
|
}
|
|
|
|
|
|
-int
|
|
|
-intelfbhw_wait_for_vsync(struct intelfb_info *dinfo, u32 pipe) {
|
|
|
+int intelfbhw_wait_for_vsync(struct intelfb_info *dinfo, u32 pipe)
|
|
|
+{
|
|
|
struct intelfb_vsync *vsync;
|
|
|
unsigned int count;
|
|
|
int ret;
|
|
@@ -2062,15 +2039,14 @@ intelfbhw_wait_for_vsync(struct intelfb_info *dinfo, u32 pipe) {
|
|
|
}
|
|
|
|
|
|
ret = intelfbhw_enable_irq(dinfo, 0);
|
|
|
- if (ret) {
|
|
|
+ if (ret)
|
|
|
return ret;
|
|
|
- }
|
|
|
|
|
|
count = vsync->count;
|
|
|
- ret = wait_event_interruptible_timeout(vsync->wait, count != vsync->count, HZ/10);
|
|
|
- if (ret < 0) {
|
|
|
+ ret = wait_event_interruptible_timeout(vsync->wait,
|
|
|
+ count != vsync->count, HZ / 10);
|
|
|
+ if (ret < 0)
|
|
|
return ret;
|
|
|
- }
|
|
|
if (ret == 0) {
|
|
|
intelfbhw_enable_irq(dinfo, 1);
|
|
|
DBG_MSG("wait_for_vsync timed out!\n");
|