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@@ -0,0 +1,1117 @@
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+/*
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+ * Copyright © 2009 - Maxim Levitsky
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+ * driver for Ricoh xD readers
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License version 2 as
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+ * published by the Free Software Foundation.
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+ */
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+
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+#include <linux/kernel.h>
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+#include <linux/module.h>
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+#include <linux/jiffies.h>
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+#include <linux/workqueue.h>
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+#include <linux/interrupt.h>
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+#include <linux/pci_ids.h>
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+#include <asm/byteorder.h>
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+#include <linux/sched.h>
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+#include "sm_common.h"
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+#include "r852.h"
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+
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+
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+static int enable_dma = 1;
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+module_param(enable_dma, bool, S_IRUGO);
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+MODULE_PARM_DESC(enable_dma, "Enable usage of the DMA (default)");
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+
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+static int debug;
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+module_param(debug, int, S_IRUGO | S_IWUSR);
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+MODULE_PARM_DESC(debug, "Debug level (0-2)");
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+
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+/* read register */
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+static inline uint8_t r852_read_reg(struct r852_device *dev, int address)
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+{
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+ uint8_t reg = readb(dev->mmio + address);
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+ return reg;
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+}
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+
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+/* write register */
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+static inline void r852_write_reg(struct r852_device *dev,
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+ int address, uint8_t value)
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+{
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+ writeb(value, dev->mmio + address);
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+ mmiowb();
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+}
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+
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+
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+/* read dword sized register */
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+static inline uint32_t r852_read_reg_dword(struct r852_device *dev, int address)
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+{
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+ uint32_t reg = le32_to_cpu(readl(dev->mmio + address));
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+ return reg;
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+}
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+
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+/* write dword sized register */
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+static inline void r852_write_reg_dword(struct r852_device *dev,
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+ int address, uint32_t value)
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+{
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+ writel(cpu_to_le32(value), dev->mmio + address);
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+ mmiowb();
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+}
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+
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+/* returns pointer to our private structure */
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+static inline struct r852_device *r852_get_dev(struct mtd_info *mtd)
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+{
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+ struct nand_chip *chip = (struct nand_chip *)mtd->priv;
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+ return (struct r852_device *)chip->priv;
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+}
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+
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+
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+/* check if controller supports dma */
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+static void r852_dma_test(struct r852_device *dev)
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+{
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+ dev->dma_usable = (r852_read_reg(dev, R852_DMA_CAP) &
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+ (R852_DMA1 | R852_DMA2)) == (R852_DMA1 | R852_DMA2);
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+
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+ if (!dev->dma_usable)
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+ message("Non dma capable device detected, dma disabled");
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+
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+ if (!enable_dma) {
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+ message("disabling dma on user request");
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+ dev->dma_usable = 0;
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+ }
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+}
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+
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+/*
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+ * Enable dma. Enables ether first or second stage of the DMA,
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+ * Expects dev->dma_dir and dev->dma_state be set
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+ */
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+static void r852_dma_enable(struct r852_device *dev)
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+{
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+ uint8_t dma_reg, dma_irq_reg;
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+
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+ /* Set up dma settings */
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+ dma_reg = r852_read_reg_dword(dev, R852_DMA_SETTINGS);
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+ dma_reg &= ~(R852_DMA_READ | R852_DMA_INTERNAL | R852_DMA_MEMORY);
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+
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+ if (dev->dma_dir)
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+ dma_reg |= R852_DMA_READ;
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+
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+ if (dev->dma_state == DMA_INTERNAL)
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+ dma_reg |= R852_DMA_INTERNAL;
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+ else {
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+ dma_reg |= R852_DMA_MEMORY;
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+ r852_write_reg_dword(dev, R852_DMA_ADDR,
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+ cpu_to_le32(dev->phys_dma_addr));
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+ }
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+
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+ r852_write_reg_dword(dev, R852_DMA_SETTINGS, dma_reg);
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+
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+ /* Set dma irq */
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+ dma_irq_reg = r852_read_reg_dword(dev, R852_DMA_IRQ_ENABLE);
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+ r852_write_reg_dword(dev, R852_DMA_IRQ_ENABLE,
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+ dma_irq_reg |
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+ R852_DMA_IRQ_INTERNAL |
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+ R852_DMA_IRQ_ERROR |
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+ R852_DMA_IRQ_MEMORY);
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+}
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+
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+/*
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+ * Disable dma, called from the interrupt handler, which specifies
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+ * success of the operation via 'error' argument
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+ */
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+static void r852_dma_done(struct r852_device *dev, int error)
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+{
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+ WARN_ON(dev->dma_stage == 0);
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+
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+ r852_write_reg_dword(dev, R852_DMA_IRQ_STA,
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+ r852_read_reg_dword(dev, R852_DMA_IRQ_STA));
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+
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+ r852_write_reg_dword(dev, R852_DMA_SETTINGS, 0);
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+ r852_write_reg_dword(dev, R852_DMA_IRQ_ENABLE, 0);
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+
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+ dev->dma_error = error;
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+ dev->dma_stage = 0;
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+
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+ if (dev->phys_dma_addr && dev->phys_dma_addr != dev->phys_bounce_buffer)
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+ pci_unmap_single(dev->pci_dev, dev->phys_dma_addr, R852_DMA_LEN,
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+ dev->dma_dir ? PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE);
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+ complete(&dev->dma_done);
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+}
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+
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+/*
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+ * Wait, till dma is done, which includes both phases of it
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+ */
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+static int r852_dma_wait(struct r852_device *dev)
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+{
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+ long timeout = wait_for_completion_timeout(&dev->dma_done,
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+ msecs_to_jiffies(1000));
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+ if (!timeout) {
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+ dbg("timeout waiting for DMA interrupt");
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+ return -ETIMEDOUT;
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+ }
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+
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+ return 0;
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+}
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+
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+/*
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+ * Read/Write one page using dma. Only pages can be read (512 bytes)
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+*/
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+static void r852_do_dma(struct r852_device *dev, uint8_t *buf, int do_read)
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+{
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+ int bounce = 0;
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+ unsigned long flags;
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+ int error;
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+
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+ dev->dma_error = 0;
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+
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+ /* Set dma direction */
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+ dev->dma_dir = do_read;
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+ dev->dma_stage = 1;
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+
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+ dbg_verbose("doing dma %s ", do_read ? "read" : "write");
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+
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+ /* Set intial dma state: for reading first fill on board buffer,
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+ from device, for writes first fill the buffer from memory*/
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+ dev->dma_state = do_read ? DMA_INTERNAL : DMA_MEMORY;
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+
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+ /* if incoming buffer is not page aligned, we should do bounce */
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+ if ((unsigned long)buf & (R852_DMA_LEN-1))
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+ bounce = 1;
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+
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+ if (!bounce) {
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+ dev->phys_dma_addr = pci_map_single(dev->pci_dev, (void *)buf,
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+ R852_DMA_LEN,
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+ (do_read ? PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE));
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+
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+ if (dev->phys_dma_addr == DMA_ERROR_CODE)
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+ bounce = 1;
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+ }
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+
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+ if (bounce) {
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+ dbg_verbose("dma: using bounce buffer");
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+ dev->phys_dma_addr = dev->phys_bounce_buffer;
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+ if (!do_read)
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+ memcpy(dev->bounce_buffer, buf, R852_DMA_LEN);
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+ }
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+
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+ /* Enable DMA */
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+ spin_lock_irqsave(&dev->irqlock, flags);
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+ r852_dma_enable(dev);
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+ spin_unlock_irqrestore(&dev->irqlock, flags);
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+
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+ /* Wait till complete */
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+ error = r852_dma_wait(dev);
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+
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+ if (error) {
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+ r852_dma_done(dev, error);
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+ return;
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+ }
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+
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+ if (do_read && bounce)
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+ memcpy((void *)buf, dev->bounce_buffer, R852_DMA_LEN);
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+}
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+
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+/*
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+ * Program data lines of the nand chip to send data to it
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+ */
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+void r852_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
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+{
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+ struct r852_device *dev = r852_get_dev(mtd);
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+ uint32_t reg;
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+
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+ /* Don't allow any access to hardware if we suspect card removal */
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+ if (dev->card_unstable)
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+ return;
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+
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+ /* Special case for whole sector read */
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+ if (len == R852_DMA_LEN && dev->dma_usable) {
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+ r852_do_dma(dev, (uint8_t *)buf, 0);
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+ return;
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+ }
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+
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+ /* write DWORD chinks - faster */
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+ while (len) {
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+ reg = buf[0] | buf[1] << 8 | buf[2] << 16 | buf[3] << 24;
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+ r852_write_reg_dword(dev, R852_DATALINE, reg);
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+ buf += 4;
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+ len -= 4;
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+
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+ }
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+
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+ /* write rest */
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+ while (len)
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+ r852_write_reg(dev, R852_DATALINE, *buf++);
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+}
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+
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+/*
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+ * Read data lines of the nand chip to retrieve data
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+ */
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+void r852_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
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+{
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+ struct r852_device *dev = r852_get_dev(mtd);
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+ uint32_t reg;
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+
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+ if (dev->card_unstable) {
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+ /* since we can't signal error here, at least, return
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+ predictable buffer */
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+ memset(buf, 0, len);
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+ return;
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+ }
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+
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+ /* special case for whole sector read */
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+ if (len == R852_DMA_LEN && dev->dma_usable) {
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+ r852_do_dma(dev, buf, 1);
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+ return;
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+ }
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+
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+ /* read in dword sized chunks */
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+ while (len >= 4) {
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+
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+ reg = r852_read_reg_dword(dev, R852_DATALINE);
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+ *buf++ = reg & 0xFF;
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+ *buf++ = (reg >> 8) & 0xFF;
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+ *buf++ = (reg >> 16) & 0xFF;
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+ *buf++ = (reg >> 24) & 0xFF;
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+ len -= 4;
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+ }
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+
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+ /* read the reset by bytes */
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+ while (len--)
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+ *buf++ = r852_read_reg(dev, R852_DATALINE);
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+}
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+
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+/*
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+ * Read one byte from nand chip
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+ */
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+static uint8_t r852_read_byte(struct mtd_info *mtd)
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+{
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+ struct r852_device *dev = r852_get_dev(mtd);
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+
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+ /* Same problem as in r852_read_buf.... */
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+ if (dev->card_unstable)
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+ return 0;
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+
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+ return r852_read_reg(dev, R852_DATALINE);
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+}
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+
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+
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+/*
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+ * Readback the buffer to verify it
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+ */
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+int r852_verify_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
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+{
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+ struct r852_device *dev = r852_get_dev(mtd);
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+
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+ /* We can't be sure about anything here... */
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+ if (dev->card_unstable)
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+ return -1;
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+
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+ /* This will never happen, unless you wired up a nand chip
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+ with > 512 bytes page size to the reader */
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+ if (len > SM_SECTOR_SIZE)
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+ return 0;
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+
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+ r852_read_buf(mtd, dev->tmp_buffer, len);
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+ return memcmp(buf, dev->tmp_buffer, len);
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+}
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+
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+/*
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+ * Control several chip lines & send commands
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+ */
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+void r852_cmdctl(struct mtd_info *mtd, int dat, unsigned int ctrl)
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+{
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+ struct r852_device *dev = r852_get_dev(mtd);
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+
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+ if (dev->card_unstable)
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+ return;
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+
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+ if (ctrl & NAND_CTRL_CHANGE) {
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+
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+ dev->ctlreg &= ~(R852_CTL_DATA | R852_CTL_COMMAND |
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+ R852_CTL_ON | R852_CTL_CARDENABLE);
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+
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+ if (ctrl & NAND_ALE)
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+ dev->ctlreg |= R852_CTL_DATA;
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+
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+ if (ctrl & NAND_CLE)
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+ dev->ctlreg |= R852_CTL_COMMAND;
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+
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+ if (ctrl & NAND_NCE)
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+ dev->ctlreg |= (R852_CTL_CARDENABLE | R852_CTL_ON);
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+ else
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+ dev->ctlreg &= ~R852_CTL_WRITE;
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+
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+ /* when write is stareted, enable write access */
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+ if (dat == NAND_CMD_ERASE1)
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+ dev->ctlreg |= R852_CTL_WRITE;
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+
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+ r852_write_reg(dev, R852_CTL, dev->ctlreg);
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+ }
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+
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+ /* HACK: NAND_CMD_SEQIN is called without NAND_CTRL_CHANGE, but we need
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+ to set write mode */
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+ if (dat == NAND_CMD_SEQIN && (dev->ctlreg & R852_CTL_COMMAND)) {
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+ dev->ctlreg |= R852_CTL_WRITE;
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+ r852_write_reg(dev, R852_CTL, dev->ctlreg);
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+ }
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+
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+ if (dat != NAND_CMD_NONE)
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+ r852_write_reg(dev, R852_DATALINE, dat);
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+}
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+
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+/*
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+ * Wait till card is ready.
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+ * based on nand_wait, but returns errors on DMA error
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+ */
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+int r852_wait(struct mtd_info *mtd, struct nand_chip *chip)
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+{
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+ struct r852_device *dev = (struct r852_device *)chip->priv;
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+
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+ unsigned long timeout;
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+ int status;
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+
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+ timeout = jiffies + (chip->state == FL_ERASING ?
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+ msecs_to_jiffies(400) : msecs_to_jiffies(20));
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+
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+ while (time_before(jiffies, timeout))
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+ if (chip->dev_ready(mtd))
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+ break;
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+
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+ chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
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+ status = (int)chip->read_byte(mtd);
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+
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+ /* Unfortunelly, no way to send detailed error status... */
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+ if (dev->dma_error) {
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+ status |= NAND_STATUS_FAIL;
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+ dev->dma_error = 0;
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+ }
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+ return status;
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+}
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+
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+/*
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+ * Check if card is ready
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+ */
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+
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+int r852_ready(struct mtd_info *mtd)
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+{
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+ struct r852_device *dev = r852_get_dev(mtd);
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+ return !(r852_read_reg(dev, R852_CARD_STA) & R852_CARD_STA_BUSY);
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+}
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+
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+
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+/*
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+ * Set ECC engine mode
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+*/
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+
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+void r852_ecc_hwctl(struct mtd_info *mtd, int mode)
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+{
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+ struct r852_device *dev = r852_get_dev(mtd);
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+
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|
+ if (dev->card_unstable)
|
|
|
+ return;
|
|
|
+
|
|
|
+ switch (mode) {
|
|
|
+ case NAND_ECC_READ:
|
|
|
+ case NAND_ECC_WRITE:
|
|
|
+ /* enable ecc generation/check*/
|
|
|
+ dev->ctlreg |= R852_CTL_ECC_ENABLE;
|
|
|
+
|
|
|
+ /* flush ecc buffer */
|
|
|
+ r852_write_reg(dev, R852_CTL,
|
|
|
+ dev->ctlreg | R852_CTL_ECC_ACCESS);
|
|
|
+
|
|
|
+ r852_read_reg_dword(dev, R852_DATALINE);
|
|
|
+ r852_write_reg(dev, R852_CTL, dev->ctlreg);
|
|
|
+ return;
|
|
|
+
|
|
|
+ case NAND_ECC_READSYN:
|
|
|
+ /* disable ecc generation */
|
|
|
+ dev->ctlreg &= ~R852_CTL_ECC_ENABLE;
|
|
|
+ r852_write_reg(dev, R852_CTL, dev->ctlreg);
|
|
|
+ }
|
|
|
+}
|
|
|
+
|
|
|
+/*
|
|
|
+ * Calculate ECC, only used for writes
|
|
|
+ */
|
|
|
+
|
|
|
+int r852_ecc_calculate(struct mtd_info *mtd, const uint8_t *dat,
|
|
|
+ uint8_t *ecc_code)
|
|
|
+{
|
|
|
+ struct r852_device *dev = r852_get_dev(mtd);
|
|
|
+ struct sm_oob *oob = (struct sm_oob *)ecc_code;
|
|
|
+ uint32_t ecc1, ecc2;
|
|
|
+
|
|
|
+ if (dev->card_unstable)
|
|
|
+ return 0;
|
|
|
+
|
|
|
+ dev->ctlreg &= ~R852_CTL_ECC_ENABLE;
|
|
|
+ r852_write_reg(dev, R852_CTL, dev->ctlreg | R852_CTL_ECC_ACCESS);
|
|
|
+
|
|
|
+ ecc1 = r852_read_reg_dword(dev, R852_DATALINE);
|
|
|
+ ecc2 = r852_read_reg_dword(dev, R852_DATALINE);
|
|
|
+
|
|
|
+ oob->ecc1[0] = (ecc1) & 0xFF;
|
|
|
+ oob->ecc1[1] = (ecc1 >> 8) & 0xFF;
|
|
|
+ oob->ecc1[2] = (ecc1 >> 16) & 0xFF;
|
|
|
+
|
|
|
+ oob->ecc2[0] = (ecc2) & 0xFF;
|
|
|
+ oob->ecc2[1] = (ecc2 >> 8) & 0xFF;
|
|
|
+ oob->ecc2[2] = (ecc2 >> 16) & 0xFF;
|
|
|
+
|
|
|
+ r852_write_reg(dev, R852_CTL, dev->ctlreg);
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+/*
|
|
|
+ * Correct the data using ECC, hw did almost everything for us
|
|
|
+ */
|
|
|
+
|
|
|
+int r852_ecc_correct(struct mtd_info *mtd, uint8_t *dat,
|
|
|
+ uint8_t *read_ecc, uint8_t *calc_ecc)
|
|
|
+{
|
|
|
+ uint16_t ecc_reg;
|
|
|
+ uint8_t ecc_status, err_byte;
|
|
|
+ int i, error = 0;
|
|
|
+
|
|
|
+ struct r852_device *dev = r852_get_dev(mtd);
|
|
|
+
|
|
|
+ if (dev->card_unstable)
|
|
|
+ return 0;
|
|
|
+
|
|
|
+ r852_write_reg(dev, R852_CTL, dev->ctlreg | R852_CTL_ECC_ACCESS);
|
|
|
+ ecc_reg = r852_read_reg_dword(dev, R852_DATALINE);
|
|
|
+ r852_write_reg(dev, R852_CTL, dev->ctlreg);
|
|
|
+
|
|
|
+ for (i = 0 ; i <= 1 ; i++) {
|
|
|
+
|
|
|
+ ecc_status = (ecc_reg >> 8) & 0xFF;
|
|
|
+
|
|
|
+ /* ecc uncorrectable error */
|
|
|
+ if (ecc_status & R852_ECC_FAIL) {
|
|
|
+ dbg("ecc: unrecoverable error, in half %d", i);
|
|
|
+ error = -1;
|
|
|
+ goto exit;
|
|
|
+ }
|
|
|
+
|
|
|
+ /* correctable error */
|
|
|
+ if (ecc_status & R852_ECC_CORRECTABLE) {
|
|
|
+
|
|
|
+ err_byte = ecc_reg & 0xFF;
|
|
|
+ dbg("ecc: recoverable error, "
|
|
|
+ "in half %d, byte %d, bit %d", i,
|
|
|
+ err_byte, ecc_status & R852_ECC_ERR_BIT_MSK);
|
|
|
+
|
|
|
+ dat[err_byte] ^=
|
|
|
+ 1 << (ecc_status & R852_ECC_ERR_BIT_MSK);
|
|
|
+ error++;
|
|
|
+ }
|
|
|
+
|
|
|
+ dat += 256;
|
|
|
+ ecc_reg >>= 16;
|
|
|
+ }
|
|
|
+exit:
|
|
|
+ return error;
|
|
|
+}
|
|
|
+
|
|
|
+/*
|
|
|
+ * This is copy of nand_read_oob_std
|
|
|
+ * nand_read_oob_syndrome assumes we can send column address - we can't
|
|
|
+ */
|
|
|
+static int r852_read_oob(struct mtd_info *mtd, struct nand_chip *chip,
|
|
|
+ int page, int sndcmd)
|
|
|
+{
|
|
|
+ if (sndcmd) {
|
|
|
+ chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page);
|
|
|
+ sndcmd = 0;
|
|
|
+ }
|
|
|
+ chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
|
|
|
+ return sndcmd;
|
|
|
+}
|
|
|
+
|
|
|
+/*
|
|
|
+ * Start the nand engine
|
|
|
+ */
|
|
|
+
|
|
|
+void r852_engine_enable(struct r852_device *dev)
|
|
|
+{
|
|
|
+ if (r852_read_reg_dword(dev, R852_HW) & R852_HW_UNKNOWN) {
|
|
|
+ r852_write_reg(dev, R852_CTL, R852_CTL_RESET | R852_CTL_ON);
|
|
|
+ r852_write_reg_dword(dev, R852_HW, R852_HW_ENABLED);
|
|
|
+ } else {
|
|
|
+ r852_write_reg_dword(dev, R852_HW, R852_HW_ENABLED);
|
|
|
+ r852_write_reg(dev, R852_CTL, R852_CTL_RESET | R852_CTL_ON);
|
|
|
+ }
|
|
|
+ msleep(300);
|
|
|
+ r852_write_reg(dev, R852_CTL, 0);
|
|
|
+}
|
|
|
+
|
|
|
+
|
|
|
+/*
|
|
|
+ * Stop the nand engine
|
|
|
+ */
|
|
|
+
|
|
|
+void r852_engine_disable(struct r852_device *dev)
|
|
|
+{
|
|
|
+ r852_write_reg_dword(dev, R852_HW, 0);
|
|
|
+ r852_write_reg(dev, R852_CTL, R852_CTL_RESET);
|
|
|
+}
|
|
|
+
|
|
|
+/*
|
|
|
+ * Test if card is present
|
|
|
+ */
|
|
|
+
|
|
|
+void r852_card_update_present(struct r852_device *dev)
|
|
|
+{
|
|
|
+ unsigned long flags;
|
|
|
+ uint8_t reg;
|
|
|
+
|
|
|
+ spin_lock_irqsave(&dev->irqlock, flags);
|
|
|
+ reg = r852_read_reg(dev, R852_CARD_STA);
|
|
|
+ dev->card_detected = !!(reg & R852_CARD_STA_PRESENT);
|
|
|
+ spin_unlock_irqrestore(&dev->irqlock, flags);
|
|
|
+}
|
|
|
+
|
|
|
+/*
|
|
|
+ * Update card detection IRQ state according to current card state
|
|
|
+ * which is read in r852_card_update_present
|
|
|
+ */
|
|
|
+void r852_update_card_detect(struct r852_device *dev)
|
|
|
+{
|
|
|
+ int card_detect_reg = r852_read_reg(dev, R852_CARD_IRQ_ENABLE);
|
|
|
+
|
|
|
+ card_detect_reg &= ~(R852_CARD_IRQ_REMOVE | R852_CARD_IRQ_INSERT);
|
|
|
+ card_detect_reg |= R852_CARD_IRQ_GENABLE;
|
|
|
+
|
|
|
+ card_detect_reg |= dev->card_detected ?
|
|
|
+ R852_CARD_IRQ_REMOVE : R852_CARD_IRQ_INSERT;
|
|
|
+
|
|
|
+ r852_write_reg(dev, R852_CARD_IRQ_ENABLE, card_detect_reg);
|
|
|
+}
|
|
|
+
|
|
|
+ssize_t r852_media_type_show(struct device *sys_dev,
|
|
|
+ struct device_attribute *attr, char *buf)
|
|
|
+{
|
|
|
+ struct mtd_info *mtd = container_of(sys_dev, struct mtd_info, dev);
|
|
|
+ struct r852_device *dev = r852_get_dev(mtd);
|
|
|
+ char *data = dev->sm ? "smartmedia" : "xd";
|
|
|
+
|
|
|
+ strcpy(buf, data);
|
|
|
+ return strlen(data);
|
|
|
+}
|
|
|
+
|
|
|
+DEVICE_ATTR(media_type, S_IRUGO, r852_media_type_show, NULL);
|
|
|
+
|
|
|
+
|
|
|
+/* Detect properties of card in slot */
|
|
|
+void r852_update_media_status(struct r852_device *dev)
|
|
|
+{
|
|
|
+ uint8_t reg;
|
|
|
+ unsigned long flags;
|
|
|
+ int readonly;
|
|
|
+
|
|
|
+ spin_lock_irqsave(&dev->irqlock, flags);
|
|
|
+ if (!dev->card_detected) {
|
|
|
+ message("card removed");
|
|
|
+ spin_unlock_irqrestore(&dev->irqlock, flags);
|
|
|
+ return ;
|
|
|
+ }
|
|
|
+
|
|
|
+ readonly = r852_read_reg(dev, R852_CARD_STA) & R852_CARD_STA_RO;
|
|
|
+ reg = r852_read_reg(dev, R852_DMA_CAP);
|
|
|
+ dev->sm = (reg & (R852_DMA1 | R852_DMA2)) && (reg & R852_SMBIT);
|
|
|
+
|
|
|
+ message("detected %s %s card in slot",
|
|
|
+ dev->sm ? "SmartMedia" : "xD",
|
|
|
+ readonly ? "readonly" : "writeable");
|
|
|
+
|
|
|
+ dev->readonly = readonly;
|
|
|
+ spin_unlock_irqrestore(&dev->irqlock, flags);
|
|
|
+}
|
|
|
+
|
|
|
+/*
|
|
|
+ * Register the nand device
|
|
|
+ * Called when the card is detected
|
|
|
+ */
|
|
|
+int r852_register_nand_device(struct r852_device *dev)
|
|
|
+{
|
|
|
+ dev->mtd = kzalloc(sizeof(struct mtd_info), GFP_KERNEL);
|
|
|
+
|
|
|
+ if (!dev->mtd)
|
|
|
+ goto error1;
|
|
|
+
|
|
|
+ WARN_ON(dev->card_registred);
|
|
|
+
|
|
|
+ dev->mtd->owner = THIS_MODULE;
|
|
|
+ dev->mtd->priv = dev->chip;
|
|
|
+ dev->mtd->dev.parent = &dev->pci_dev->dev;
|
|
|
+
|
|
|
+ if (dev->readonly)
|
|
|
+ dev->chip->options |= NAND_ROM;
|
|
|
+
|
|
|
+ r852_engine_enable(dev);
|
|
|
+
|
|
|
+ if (sm_register_device(dev->mtd))
|
|
|
+ goto error2;
|
|
|
+
|
|
|
+ device_create_file(&dev->mtd->dev, &dev_attr_media_type);
|
|
|
+ dev->card_registred = 1;
|
|
|
+ return 0;
|
|
|
+error2:
|
|
|
+ kfree(dev->mtd);
|
|
|
+error1:
|
|
|
+ /* Force card redetect */
|
|
|
+ dev->card_detected = 0;
|
|
|
+ return -1;
|
|
|
+}
|
|
|
+
|
|
|
+/*
|
|
|
+ * Unregister the card
|
|
|
+ */
|
|
|
+
|
|
|
+void r852_unregister_nand_device(struct r852_device *dev)
|
|
|
+{
|
|
|
+ if (!dev->card_registred)
|
|
|
+ return;
|
|
|
+
|
|
|
+ device_remove_file(&dev->mtd->dev, &dev_attr_media_type);
|
|
|
+ nand_release(dev->mtd);
|
|
|
+ r852_engine_disable(dev);
|
|
|
+ dev->card_registred = 0;
|
|
|
+ kfree(dev->mtd);
|
|
|
+ dev->mtd = NULL;
|
|
|
+}
|
|
|
+
|
|
|
+/* Card state updater */
|
|
|
+void r852_card_detect_work(struct work_struct *work)
|
|
|
+{
|
|
|
+ struct r852_device *dev =
|
|
|
+ container_of(work, struct r852_device, card_detect_work.work);
|
|
|
+
|
|
|
+ r852_update_card_detect(dev);
|
|
|
+ dev->card_unstable = 0;
|
|
|
+
|
|
|
+ /* false alarm */
|
|
|
+ if (dev->card_detected == dev->card_registred)
|
|
|
+ goto exit;
|
|
|
+
|
|
|
+ /* Read media properties */
|
|
|
+ r852_update_media_status(dev);
|
|
|
+
|
|
|
+ /* Register the card */
|
|
|
+ if (dev->card_detected)
|
|
|
+ r852_register_nand_device(dev);
|
|
|
+ else
|
|
|
+ r852_unregister_nand_device(dev);
|
|
|
+exit:
|
|
|
+ /* Update detection logic */
|
|
|
+ r852_update_card_detect(dev);
|
|
|
+}
|
|
|
+
|
|
|
+/* Ack + disable IRQ generation */
|
|
|
+static void r852_disable_irqs(struct r852_device *dev)
|
|
|
+{
|
|
|
+ uint8_t reg;
|
|
|
+ reg = r852_read_reg(dev, R852_CARD_IRQ_ENABLE);
|
|
|
+ r852_write_reg(dev, R852_CARD_IRQ_ENABLE, reg & ~R852_CARD_IRQ_MASK);
|
|
|
+
|
|
|
+ reg = r852_read_reg_dword(dev, R852_DMA_IRQ_ENABLE);
|
|
|
+ r852_write_reg_dword(dev, R852_DMA_IRQ_ENABLE,
|
|
|
+ reg & ~R852_DMA_IRQ_MASK);
|
|
|
+
|
|
|
+ r852_write_reg(dev, R852_CARD_IRQ_STA, R852_CARD_IRQ_MASK);
|
|
|
+ r852_write_reg_dword(dev, R852_DMA_IRQ_STA, R852_DMA_IRQ_MASK);
|
|
|
+}
|
|
|
+
|
|
|
+/* Interrupt handler */
|
|
|
+static irqreturn_t r852_irq(int irq, void *data)
|
|
|
+{
|
|
|
+ struct r852_device *dev = (struct r852_device *)data;
|
|
|
+
|
|
|
+ uint8_t card_status, dma_status;
|
|
|
+ unsigned long flags;
|
|
|
+ irqreturn_t ret = IRQ_NONE;
|
|
|
+
|
|
|
+ spin_lock_irqsave(&dev->irqlock, flags);
|
|
|
+
|
|
|
+ /* We can recieve shared interrupt while pci is suspended
|
|
|
+ in that case reads will return 0xFFFFFFFF.... */
|
|
|
+ if (dev->insuspend)
|
|
|
+ goto out;
|
|
|
+
|
|
|
+ /* handle card detection interrupts first */
|
|
|
+ card_status = r852_read_reg(dev, R852_CARD_IRQ_STA);
|
|
|
+ r852_write_reg(dev, R852_CARD_IRQ_STA, card_status);
|
|
|
+
|
|
|
+ if (card_status & (R852_CARD_IRQ_INSERT|R852_CARD_IRQ_REMOVE)) {
|
|
|
+
|
|
|
+ ret = IRQ_HANDLED;
|
|
|
+ dev->card_detected = !!(card_status & R852_CARD_IRQ_INSERT);
|
|
|
+
|
|
|
+ /* we shouldn't recieve any interrupts if we wait for card
|
|
|
+ to settle */
|
|
|
+ WARN_ON(dev->card_unstable);
|
|
|
+
|
|
|
+ /* disable irqs while card is unstable */
|
|
|
+ /* this will timeout DMA if active, but better that garbage */
|
|
|
+ r852_disable_irqs(dev);
|
|
|
+
|
|
|
+ if (dev->card_unstable)
|
|
|
+ goto out;
|
|
|
+
|
|
|
+ /* let, card state to settle a bit, and then do the work */
|
|
|
+ dev->card_unstable = 1;
|
|
|
+ queue_delayed_work(dev->card_workqueue,
|
|
|
+ &dev->card_detect_work, msecs_to_jiffies(100));
|
|
|
+ goto out;
|
|
|
+ }
|
|
|
+
|
|
|
+
|
|
|
+ /* Handle dma interrupts */
|
|
|
+ dma_status = r852_read_reg_dword(dev, R852_DMA_IRQ_STA);
|
|
|
+ r852_write_reg_dword(dev, R852_DMA_IRQ_STA, dma_status);
|
|
|
+
|
|
|
+ if (dma_status & R852_DMA_IRQ_MASK) {
|
|
|
+
|
|
|
+ ret = IRQ_HANDLED;
|
|
|
+
|
|
|
+ if (dma_status & R852_DMA_IRQ_ERROR) {
|
|
|
+ dbg("recieved dma error IRQ");
|
|
|
+ r852_dma_done(dev, -EIO);
|
|
|
+ goto out;
|
|
|
+ }
|
|
|
+
|
|
|
+ /* recieved DMA interrupt out of nowhere? */
|
|
|
+ WARN_ON_ONCE(dev->dma_stage == 0);
|
|
|
+
|
|
|
+ if (dev->dma_stage == 0)
|
|
|
+ goto out;
|
|
|
+
|
|
|
+ /* done device access */
|
|
|
+ if (dev->dma_state == DMA_INTERNAL &&
|
|
|
+ (dma_status & R852_DMA_IRQ_INTERNAL)) {
|
|
|
+
|
|
|
+ dev->dma_state = DMA_MEMORY;
|
|
|
+ dev->dma_stage++;
|
|
|
+ }
|
|
|
+
|
|
|
+ /* done memory DMA */
|
|
|
+ if (dev->dma_state == DMA_MEMORY &&
|
|
|
+ (dma_status & R852_DMA_IRQ_MEMORY)) {
|
|
|
+ dev->dma_state = DMA_INTERNAL;
|
|
|
+ dev->dma_stage++;
|
|
|
+ }
|
|
|
+
|
|
|
+ /* Enable 2nd half of dma dance */
|
|
|
+ if (dev->dma_stage == 2)
|
|
|
+ r852_dma_enable(dev);
|
|
|
+
|
|
|
+ /* Operation done */
|
|
|
+ if (dev->dma_stage == 3)
|
|
|
+ r852_dma_done(dev, 0);
|
|
|
+ goto out;
|
|
|
+ }
|
|
|
+
|
|
|
+ /* Handle unknown interrupts */
|
|
|
+ if (dma_status)
|
|
|
+ dbg("bad dma IRQ status = %x", dma_status);
|
|
|
+
|
|
|
+ if (card_status & ~R852_CARD_STA_CD)
|
|
|
+ dbg("strange card status = %x", card_status);
|
|
|
+
|
|
|
+out:
|
|
|
+ spin_unlock_irqrestore(&dev->irqlock, flags);
|
|
|
+ return ret;
|
|
|
+}
|
|
|
+
|
|
|
+int r852_probe(struct pci_dev *pci_dev, const struct pci_device_id *id)
|
|
|
+{
|
|
|
+ int error;
|
|
|
+ struct nand_chip *chip;
|
|
|
+ struct r852_device *dev;
|
|
|
+
|
|
|
+ /* pci initialization */
|
|
|
+ error = pci_enable_device(pci_dev);
|
|
|
+
|
|
|
+ if (error)
|
|
|
+ goto error1;
|
|
|
+
|
|
|
+ pci_set_master(pci_dev);
|
|
|
+
|
|
|
+ error = pci_set_dma_mask(pci_dev, DMA_32BIT_MASK);
|
|
|
+ if (error)
|
|
|
+ goto error2;
|
|
|
+
|
|
|
+ error = pci_request_regions(pci_dev, DRV_NAME);
|
|
|
+
|
|
|
+ if (error)
|
|
|
+ goto error3;
|
|
|
+
|
|
|
+ error = -ENOMEM;
|
|
|
+
|
|
|
+ /* init nand chip, but register it only on card insert */
|
|
|
+ chip = kzalloc(sizeof(struct nand_chip), GFP_KERNEL);
|
|
|
+
|
|
|
+ if (!chip)
|
|
|
+ goto error4;
|
|
|
+
|
|
|
+ /* commands */
|
|
|
+ chip->cmd_ctrl = r852_cmdctl;
|
|
|
+ chip->waitfunc = r852_wait;
|
|
|
+ chip->dev_ready = r852_ready;
|
|
|
+
|
|
|
+ /* I/O */
|
|
|
+ chip->read_byte = r852_read_byte;
|
|
|
+ chip->read_buf = r852_read_buf;
|
|
|
+ chip->write_buf = r852_write_buf;
|
|
|
+ chip->verify_buf = r852_verify_buf;
|
|
|
+
|
|
|
+ /* ecc */
|
|
|
+ chip->ecc.mode = NAND_ECC_HW_SYNDROME;
|
|
|
+ chip->ecc.size = R852_DMA_LEN;
|
|
|
+ chip->ecc.bytes = SM_OOB_SIZE;
|
|
|
+ chip->ecc.hwctl = r852_ecc_hwctl;
|
|
|
+ chip->ecc.calculate = r852_ecc_calculate;
|
|
|
+ chip->ecc.correct = r852_ecc_correct;
|
|
|
+
|
|
|
+ /* TODO: hack */
|
|
|
+ chip->ecc.read_oob = r852_read_oob;
|
|
|
+
|
|
|
+ /* init our device structure */
|
|
|
+ dev = kzalloc(sizeof(struct r852_device), GFP_KERNEL);
|
|
|
+
|
|
|
+ if (!dev)
|
|
|
+ goto error5;
|
|
|
+
|
|
|
+ chip->priv = dev;
|
|
|
+ dev->chip = chip;
|
|
|
+ dev->pci_dev = pci_dev;
|
|
|
+ pci_set_drvdata(pci_dev, dev);
|
|
|
+
|
|
|
+ dev->bounce_buffer = pci_alloc_consistent(pci_dev, R852_DMA_LEN,
|
|
|
+ &dev->phys_bounce_buffer);
|
|
|
+
|
|
|
+ if (!dev->bounce_buffer)
|
|
|
+ goto error6;
|
|
|
+
|
|
|
+
|
|
|
+ error = -ENODEV;
|
|
|
+ dev->mmio = pci_ioremap_bar(pci_dev, 0);
|
|
|
+
|
|
|
+ if (!dev->mmio)
|
|
|
+ goto error7;
|
|
|
+
|
|
|
+ error = -ENOMEM;
|
|
|
+ dev->tmp_buffer = kzalloc(SM_SECTOR_SIZE, GFP_KERNEL);
|
|
|
+
|
|
|
+ if (!dev->tmp_buffer)
|
|
|
+ goto error8;
|
|
|
+
|
|
|
+ init_completion(&dev->dma_done);
|
|
|
+
|
|
|
+ dev->card_workqueue = create_freezeable_workqueue(DRV_NAME);
|
|
|
+
|
|
|
+ if (!dev->card_workqueue)
|
|
|
+ goto error9;
|
|
|
+
|
|
|
+ INIT_DELAYED_WORK(&dev->card_detect_work, r852_card_detect_work);
|
|
|
+
|
|
|
+ /* shutdown everything - precation */
|
|
|
+ r852_engine_disable(dev);
|
|
|
+ r852_disable_irqs(dev);
|
|
|
+
|
|
|
+ r852_dma_test(dev);
|
|
|
+
|
|
|
+ /*register irq handler*/
|
|
|
+ error = -ENODEV;
|
|
|
+ if (request_irq(pci_dev->irq, &r852_irq, IRQF_SHARED,
|
|
|
+ DRV_NAME, dev))
|
|
|
+ goto error10;
|
|
|
+
|
|
|
+ dev->irq = pci_dev->irq;
|
|
|
+ spin_lock_init(&dev->irqlock);
|
|
|
+
|
|
|
+ /* kick initial present test */
|
|
|
+ dev->card_detected = 0;
|
|
|
+ r852_card_update_present(dev);
|
|
|
+ queue_delayed_work(dev->card_workqueue,
|
|
|
+ &dev->card_detect_work, 0);
|
|
|
+
|
|
|
+
|
|
|
+ printk(KERN_NOTICE DRV_NAME ": driver loaded succesfully\n");
|
|
|
+ return 0;
|
|
|
+
|
|
|
+error10:
|
|
|
+ destroy_workqueue(dev->card_workqueue);
|
|
|
+error9:
|
|
|
+ kfree(dev->tmp_buffer);
|
|
|
+error8:
|
|
|
+ pci_iounmap(pci_dev, dev->mmio);
|
|
|
+error7:
|
|
|
+ pci_free_consistent(pci_dev, R852_DMA_LEN,
|
|
|
+ dev->bounce_buffer, dev->phys_bounce_buffer);
|
|
|
+error6:
|
|
|
+ kfree(dev);
|
|
|
+error5:
|
|
|
+ kfree(chip);
|
|
|
+error4:
|
|
|
+ pci_release_regions(pci_dev);
|
|
|
+error3:
|
|
|
+error2:
|
|
|
+ pci_disable_device(pci_dev);
|
|
|
+error1:
|
|
|
+ return error;
|
|
|
+}
|
|
|
+
|
|
|
+void r852_remove(struct pci_dev *pci_dev)
|
|
|
+{
|
|
|
+ struct r852_device *dev = pci_get_drvdata(pci_dev);
|
|
|
+
|
|
|
+ /* Stop detect workqueue -
|
|
|
+ we are going to unregister the device anyway*/
|
|
|
+ cancel_delayed_work_sync(&dev->card_detect_work);
|
|
|
+ destroy_workqueue(dev->card_workqueue);
|
|
|
+
|
|
|
+ /* Unregister the device, this might make more IO */
|
|
|
+ r852_unregister_nand_device(dev);
|
|
|
+
|
|
|
+ /* Stop interrupts */
|
|
|
+ r852_disable_irqs(dev);
|
|
|
+ synchronize_irq(dev->irq);
|
|
|
+ free_irq(dev->irq, dev);
|
|
|
+
|
|
|
+ /* Cleanup */
|
|
|
+ kfree(dev->tmp_buffer);
|
|
|
+ pci_iounmap(pci_dev, dev->mmio);
|
|
|
+ pci_free_consistent(pci_dev, R852_DMA_LEN,
|
|
|
+ dev->bounce_buffer, dev->phys_bounce_buffer);
|
|
|
+
|
|
|
+ kfree(dev->chip);
|
|
|
+ kfree(dev);
|
|
|
+
|
|
|
+ /* Shutdown the PCI device */
|
|
|
+ pci_release_regions(pci_dev);
|
|
|
+ pci_disable_device(pci_dev);
|
|
|
+}
|
|
|
+
|
|
|
+void r852_shutdown(struct pci_dev *pci_dev)
|
|
|
+{
|
|
|
+ struct r852_device *dev = pci_get_drvdata(pci_dev);
|
|
|
+
|
|
|
+ cancel_delayed_work_sync(&dev->card_detect_work);
|
|
|
+ r852_disable_irqs(dev);
|
|
|
+ synchronize_irq(dev->irq);
|
|
|
+ pci_disable_device(pci_dev);
|
|
|
+}
|
|
|
+
|
|
|
+int r852_suspend(struct device *device)
|
|
|
+{
|
|
|
+ struct r852_device *dev = pci_get_drvdata(to_pci_dev(device));
|
|
|
+ unsigned long flags;
|
|
|
+
|
|
|
+ if (dev->ctlreg & R852_CTL_CARDENABLE)
|
|
|
+ return -EBUSY;
|
|
|
+
|
|
|
+ /* First make sure the detect work is gone */
|
|
|
+ cancel_delayed_work_sync(&dev->card_detect_work);
|
|
|
+
|
|
|
+ /* Turn off the interrupts and stop the device */
|
|
|
+ r852_disable_irqs(dev);
|
|
|
+ r852_engine_disable(dev);
|
|
|
+
|
|
|
+ spin_lock_irqsave(&dev->irqlock, flags);
|
|
|
+ dev->insuspend = 1;
|
|
|
+ spin_unlock_irqrestore(&dev->irqlock, flags);
|
|
|
+
|
|
|
+ /* At that point, even if interrupt handler is running, it will quit */
|
|
|
+ /* So wait for this to happen explictly */
|
|
|
+ synchronize_irq(dev->irq);
|
|
|
+
|
|
|
+ /* If card was pulled off just during the suspend, which is very
|
|
|
+ unlikely, we will remove it on resume, it too late now
|
|
|
+ anyway... */
|
|
|
+ dev->card_unstable = 0;
|
|
|
+
|
|
|
+ pci_save_state(to_pci_dev(device));
|
|
|
+ return pci_prepare_to_sleep(to_pci_dev(device));
|
|
|
+}
|
|
|
+
|
|
|
+int r852_resume(struct device *device)
|
|
|
+{
|
|
|
+ struct r852_device *dev = pci_get_drvdata(to_pci_dev(device));
|
|
|
+ unsigned long flags;
|
|
|
+
|
|
|
+ /* Turn on the hardware */
|
|
|
+ pci_back_from_sleep(to_pci_dev(device));
|
|
|
+ pci_restore_state(to_pci_dev(device));
|
|
|
+
|
|
|
+ r852_disable_irqs(dev);
|
|
|
+ r852_card_update_present(dev);
|
|
|
+ r852_engine_disable(dev);
|
|
|
+
|
|
|
+
|
|
|
+ /* Now its safe for IRQ to run */
|
|
|
+ spin_lock_irqsave(&dev->irqlock, flags);
|
|
|
+ dev->insuspend = 0;
|
|
|
+ spin_unlock_irqrestore(&dev->irqlock, flags);
|
|
|
+
|
|
|
+
|
|
|
+ /* If card status changed, just do the work */
|
|
|
+ if (dev->card_detected != dev->card_registred) {
|
|
|
+ dbg("card was %s during low power state",
|
|
|
+ dev->card_detected ? "added" : "removed");
|
|
|
+
|
|
|
+ queue_delayed_work(dev->card_workqueue,
|
|
|
+ &dev->card_detect_work, 1000);
|
|
|
+ return 0;
|
|
|
+ }
|
|
|
+
|
|
|
+ /* Otherwise, initialize the card */
|
|
|
+ if (dev->card_registred) {
|
|
|
+ r852_engine_enable(dev);
|
|
|
+ dev->chip->select_chip(dev->mtd, 0);
|
|
|
+ dev->chip->cmdfunc(dev->mtd, NAND_CMD_RESET, -1, -1);
|
|
|
+ dev->chip->select_chip(dev->mtd, -1);
|
|
|
+ }
|
|
|
+
|
|
|
+ /* Program card detection IRQ */
|
|
|
+ r852_update_card_detect(dev);
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+static const struct pci_device_id r852_pci_id_tbl[] = {
|
|
|
+
|
|
|
+ { PCI_VDEVICE(RICOH, PCI_DEVICE_ID_RICOH_R5C852), },
|
|
|
+ { },
|
|
|
+};
|
|
|
+
|
|
|
+MODULE_DEVICE_TABLE(pci, r852_pci_id_tbl);
|
|
|
+
|
|
|
+SIMPLE_DEV_PM_OPS(r852_pm_ops, r852_suspend, r852_resume);
|
|
|
+
|
|
|
+
|
|
|
+static struct pci_driver r852_pci_driver = {
|
|
|
+ .name = DRV_NAME,
|
|
|
+ .id_table = r852_pci_id_tbl,
|
|
|
+ .probe = r852_probe,
|
|
|
+ .remove = r852_remove,
|
|
|
+ .shutdown = r852_shutdown,
|
|
|
+ .driver.pm = &r852_pm_ops,
|
|
|
+};
|
|
|
+
|
|
|
+static __init int r852_module_init(void)
|
|
|
+{
|
|
|
+ return pci_register_driver(&r852_pci_driver);
|
|
|
+}
|
|
|
+
|
|
|
+static void __exit r852_module_exit(void)
|
|
|
+{
|
|
|
+ pci_unregister_driver(&r852_pci_driver);
|
|
|
+}
|
|
|
+
|
|
|
+module_init(r852_module_init);
|
|
|
+module_exit(r852_module_exit);
|
|
|
+
|
|
|
+MODULE_LICENSE("GPL");
|
|
|
+MODULE_AUTHOR("Maxim Levitsky <maximlevitsky@gmail.com>");
|
|
|
+MODULE_DESCRIPTION("Ricoh 85xx xD/smartmedia card reader driver");
|
Maxim Levitsky