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@@ -68,6 +68,10 @@ static void b43_nphy_set_rf_sequence(struct b43_wldev *dev, u8 cmd,
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u8 *events, u8 *delays, u8 length);
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static void b43_nphy_force_rf_sequence(struct b43_wldev *dev,
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enum b43_nphy_rf_sequence seq);
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+static void b43_nphy_rf_control_override(struct b43_wldev *dev, u16 field,
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+ u16 value, u8 core, bool off);
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+static void b43_nphy_rf_control_intc_override(struct b43_wldev *dev, u8 field,
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+ u16 value, u8 core);
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void b43_nphy_set_rxantenna(struct b43_wldev *dev, int antenna)
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{//TODO
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@@ -498,8 +502,8 @@ static void b43_nphy_rx_cal_phy_setup(struct b43_wldev *dev, u8 core)
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b43_phy_set(dev, B43_NPHY_AFECTL_OVER, 0x0007);
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}
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- /* TODO: Call N PHY RF Ctrl Intc Override with 2, 0, 3 as arguments */
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- /* TODO: Call N PHY RF Intc Override with 8, 0, 3, 0 as arguments */
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+ b43_nphy_rf_control_intc_override(dev, 2, 0, 3);
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+ b43_nphy_rf_control_override(dev, 8, 0, 3, false);
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b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RX2TX);
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if (core == 0) {
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@@ -509,9 +513,8 @@ static void b43_nphy_rx_cal_phy_setup(struct b43_wldev *dev, u8 core)
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rxval = 4;
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txval = 2;
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}
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-
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- /* TODO: Call N PHY RF Ctrl Intc Override with 1, rxval, (core + 1) */
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- /* TODO: Call N PHY RF Ctrl Intc Override with 1, txval, (2 - core) */
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+ b43_nphy_rf_control_intc_override(dev, 1, rxval, (core + 1));
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+ b43_nphy_rf_control_intc_override(dev, 1, txval, (2 - core));
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}
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/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/CalcRxIqComp */
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@@ -1264,6 +1267,104 @@ static void b43_nphy_rf_control_override(struct b43_wldev *dev, u16 field,
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}
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}
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+/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RFCtrlIntcOverride */
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+static void b43_nphy_rf_control_intc_override(struct b43_wldev *dev, u8 field,
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+ u16 value, u8 core)
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+{
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+ u8 i, j;
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+ u16 reg, tmp, val;
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+
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+ B43_WARN_ON(dev->phy.rev < 3);
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+ B43_WARN_ON(field > 4);
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+
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+ for (i = 0; i < 2; i++) {
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+ if ((core == 1 && i == 1) || (core == 2 && !i))
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+ continue;
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+
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+ reg = (i == 0) ?
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+ B43_NPHY_RFCTL_INTC1 : B43_NPHY_RFCTL_INTC2;
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+ b43_phy_mask(dev, reg, 0xFBFF);
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+
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+ switch (field) {
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+ case 0:
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+ b43_phy_write(dev, reg, 0);
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+ b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RESET2RX);
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+ break;
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+ case 1:
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+ if (!i) {
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+ b43_phy_maskset(dev, B43_NPHY_RFCTL_INTC1,
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+ 0xFC3F, (value << 6));
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+ b43_phy_maskset(dev, B43_NPHY_TXF_40CO_B1S1,
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+ 0xFFFE, 1);
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+ b43_phy_set(dev, B43_NPHY_RFCTL_CMD,
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+ B43_NPHY_RFCTL_CMD_START);
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+ for (j = 0; j < 100; j++) {
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+ if (b43_phy_read(dev, B43_NPHY_RFCTL_CMD) & B43_NPHY_RFCTL_CMD_START) {
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+ j = 0;
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+ break;
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+ }
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+ udelay(10);
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+ }
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+ if (j)
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+ b43err(dev->wl,
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+ "intc override timeout\n");
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+ b43_phy_mask(dev, B43_NPHY_TXF_40CO_B1S1,
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+ 0xFFFE);
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+ } else {
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+ b43_phy_maskset(dev, B43_NPHY_RFCTL_INTC2,
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+ 0xFC3F, (value << 6));
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+ b43_phy_maskset(dev, B43_NPHY_RFCTL_OVER,
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+ 0xFFFE, 1);
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+ b43_phy_set(dev, B43_NPHY_RFCTL_CMD,
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+ B43_NPHY_RFCTL_CMD_RXTX);
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+ for (j = 0; j < 100; j++) {
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+ if (b43_phy_read(dev, B43_NPHY_RFCTL_CMD) & B43_NPHY_RFCTL_CMD_RXTX) {
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+ j = 0;
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+ break;
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+ }
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+ udelay(10);
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+ }
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+ if (j)
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+ b43err(dev->wl,
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+ "intc override timeout\n");
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+ b43_phy_mask(dev, B43_NPHY_RFCTL_OVER,
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+ 0xFFFE);
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+ }
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+ break;
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+ case 2:
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+ if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) {
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+ tmp = 0x0020;
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+ val = value << 5;
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+ } else {
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+ tmp = 0x0010;
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+ val = value << 4;
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+ }
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+ b43_phy_maskset(dev, reg, ~tmp, val);
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+ break;
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+ case 3:
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+ if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) {
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+ tmp = 0x0001;
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+ val = value;
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+ } else {
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+ tmp = 0x0004;
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+ val = value << 2;
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+ }
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+ b43_phy_maskset(dev, reg, ~tmp, val);
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+ break;
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+ case 4:
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+ if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) {
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+ tmp = 0x0002;
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+ val = value << 1;
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+ } else {
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+ tmp = 0x0008;
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+ val = value << 3;
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+ }
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+ b43_phy_maskset(dev, reg, ~tmp, val);
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+ break;
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+ }
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+ }
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+}
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+
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static void b43_nphy_bphy_init(struct b43_wldev *dev)
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{
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unsigned int i;
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@@ -2161,9 +2262,9 @@ static void b43_nphy_tx_cal_phy_setup(struct b43_wldev *dev)
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regs[7] = b43_phy_read(dev, B43_NPHY_RFCTL_INTC1);
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regs[8] = b43_phy_read(dev, B43_NPHY_RFCTL_INTC2);
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- /* TODO: Call N PHY RF Ctrl Intc Override with 2, 1, 3 */
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- /* TODO: Call N PHY RF Ctrl Intc Override with 1, 2, 1 */
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- /* TODO: Call N PHY RF Ctrl Intc Override with 1, 8, 2 */
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+ b43_nphy_rf_control_intc_override(dev, 2, 1, 3);
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+ b43_nphy_rf_control_intc_override(dev, 1, 2, 1);
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+ b43_nphy_rf_control_intc_override(dev, 1, 8, 2);
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regs[9] = b43_phy_read(dev, B43_NPHY_PAPD_EN0);
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regs[10] = b43_phy_read(dev, B43_NPHY_PAPD_EN1);
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