dmaengine: shdma: add chcr_ie_bit

IE bit position on CHCR register is not same in all DMAC.
This patch adds new "chcr_ie_bit" to decide it.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>

drivers/dma/shdma.c

@@ -181,17 +181,19 @@ static void dmae_set_reg(struct sh_dmae_chan *sh_chan, struct sh_dmae_regs *hw)
 
 static void dmae_start(struct sh_dmae_chan *sh_chan)
 {
+	struct sh_dmae_device *shdev = to_sh_dev(sh_chan);
 	u32 chcr = chcr_read(sh_chan);
 
-	chcr |= CHCR_DE | CHCR_IE;
+	chcr |= CHCR_DE | shdev->chcr_ie_bit;
 	chcr_write(sh_chan, chcr & ~CHCR_TE);
 }
 
 static void dmae_halt(struct sh_dmae_chan *sh_chan)
 {
+	struct sh_dmae_device *shdev = to_sh_dev(sh_chan);
 	u32 chcr = chcr_read(sh_chan);
 
-	chcr &= ~(CHCR_DE | CHCR_TE | CHCR_IE);
+	chcr &= ~(CHCR_DE | CHCR_TE | shdev->chcr_ie_bit);
 	chcr_write(sh_chan, chcr);
 }
 
@@ -1157,6 +1159,11 @@ static int __init sh_dmae_probe(struct platform_device *pdev)
 	else
 		shdev->chcr_offset = CHCR;
 
+	if (pdata->chcr_ie_bit)
+		shdev->chcr_ie_bit = pdata->chcr_ie_bit;
+	else
+		shdev->chcr_ie_bit = CHCR_IE;
+
 	platform_set_drvdata(pdev, shdev);
 
 	pm_runtime_enable(&pdev->dev);

drivers/dma/shdma.h

@@ -48,6 +48,7 @@ struct sh_dmae_device {
 	u32 __iomem *chan_reg;
 	u16 __iomem *dmars;
 	unsigned int chcr_offset;
+	u32 chcr_ie_bit;
 };
 
 #define to_sh_chan(chan) container_of(chan, struct sh_dmae_chan, common)

include/linux/sh_dma.h

@@ -63,6 +63,7 @@ struct sh_dmae_pdata {
 	int ts_shift_num;
 	u16 dmaor_init;
 	unsigned int chcr_offset;
+	u32 chcr_ie_bit;
 };
 
 /* DMA register */