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@@ -421,8 +421,10 @@ void gen6_gt_force_wake_put(struct drm_i915_private *dev_priv)
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spin_unlock_irqrestore(&dev_priv->gt_lock, irqflags);
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}
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-void __gen6_gt_wait_for_fifo(struct drm_i915_private *dev_priv)
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+int __gen6_gt_wait_for_fifo(struct drm_i915_private *dev_priv)
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{
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+ int ret = 0;
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+
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if (dev_priv->gt_fifo_count < GT_FIFO_NUM_RESERVED_ENTRIES) {
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int loop = 500;
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u32 fifo = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES);
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@@ -430,10 +432,13 @@ void __gen6_gt_wait_for_fifo(struct drm_i915_private *dev_priv)
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udelay(10);
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fifo = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES);
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}
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- WARN_ON(loop < 0 && fifo <= GT_FIFO_NUM_RESERVED_ENTRIES);
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+ if (WARN_ON(loop < 0 && fifo <= GT_FIFO_NUM_RESERVED_ENTRIES))
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+ ++ret;
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dev_priv->gt_fifo_count = fifo;
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}
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dev_priv->gt_fifo_count--;
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+
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+ return ret;
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}
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static int i915_drm_freeze(struct drm_device *dev)
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@@ -1001,11 +1006,15 @@ __i915_read(64, q)
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#define __i915_write(x, y) \
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void i915_write##x(struct drm_i915_private *dev_priv, u32 reg, u##x val) { \
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+ u32 __fifo_ret = 0; \
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trace_i915_reg_rw(true, reg, val, sizeof(val)); \
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if (NEEDS_FORCE_WAKE((dev_priv), (reg))) { \
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- __gen6_gt_wait_for_fifo(dev_priv); \
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+ __fifo_ret = __gen6_gt_wait_for_fifo(dev_priv); \
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} \
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write##y(val, dev_priv->regs + reg); \
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+ if (unlikely(__fifo_ret)) { \
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+ gen6_gt_check_fifodbg(dev_priv); \
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+ } \
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}
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__i915_write(8, b)
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__i915_write(16, w)
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