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@@ -54,6 +54,12 @@ extern void __raw_readsl(void __iomem *addr, void *data, int longlen);
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#define __raw_readw(a) (__chk_io_ptr(a), *(volatile unsigned short __force *)(a))
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#define __raw_readl(a) (__chk_io_ptr(a), *(volatile unsigned int __force *)(a))
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+/*
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+ * Architecture ioremap implementation.
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+ */
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+extern void __iomem * __ioremap(unsigned long, size_t, unsigned long);
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+extern void __iounmap(void __iomem *addr);
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+
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/*
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* Bad read/write accesses...
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*/
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@@ -256,18 +262,15 @@ out:
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* ioremap takes a PCI memory address, as specified in
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* Documentation/IO-mapping.txt.
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*/
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-extern void __iomem * __ioremap(unsigned long, size_t, unsigned long, unsigned long);
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-extern void __iounmap(void __iomem *addr);
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-
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#ifndef __arch_ioremap
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-#define ioremap(cookie,size) __ioremap(cookie,size,0,1)
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-#define ioremap_nocache(cookie,size) __ioremap(cookie,size,0,1)
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-#define ioremap_cached(cookie,size) __ioremap(cookie,size,L_PTE_CACHEABLE,1)
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+#define ioremap(cookie,size) __ioremap(cookie,size,0)
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+#define ioremap_nocache(cookie,size) __ioremap(cookie,size,0)
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+#define ioremap_cached(cookie,size) __ioremap(cookie,size,L_PTE_CACHEABLE)
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#define iounmap(cookie) __iounmap(cookie)
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#else
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-#define ioremap(cookie,size) __arch_ioremap((cookie),(size),0,1)
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-#define ioremap_nocache(cookie,size) __arch_ioremap((cookie),(size),0,1)
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-#define ioremap_cached(cookie,size) __arch_ioremap((cookie),(size),L_PTE_CACHEABLE,1)
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+#define ioremap(cookie,size) __arch_ioremap((cookie),(size),0)
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+#define ioremap_nocache(cookie,size) __arch_ioremap((cookie),(size),0)
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+#define ioremap_cached(cookie,size) __arch_ioremap((cookie),(size),L_PTE_CACHEABLE)
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#define iounmap(cookie) __arch_iounmap(cookie)
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#endif
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