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@@ -63,7 +63,6 @@
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*/
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static DEFINE_MUTEX(io_mutex);
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static DEFINE_MUTEX(reg_lock_mutex);
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-static DEFINE_MUTEX(auxadc_mutex);
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/* Perform a physical read from the device.
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*/
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@@ -1082,6 +1081,55 @@ int wm8350_unmask_irq(struct wm8350 *wm8350, int irq)
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}
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EXPORT_SYMBOL_GPL(wm8350_unmask_irq);
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+int wm8350_read_auxadc(struct wm8350 *wm8350, int channel, int scale, int vref)
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+{
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+ u16 reg, result = 0;
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+ int tries = 5;
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+
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+ if (channel < WM8350_AUXADC_AUX1 || channel > WM8350_AUXADC_TEMP)
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+ return -EINVAL;
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+ if (channel >= WM8350_AUXADC_USB && channel <= WM8350_AUXADC_TEMP
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+ && (scale != 0 || vref != 0))
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+ return -EINVAL;
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+
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+ mutex_lock(&wm8350->auxadc_mutex);
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+
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+ /* Turn on the ADC */
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+ reg = wm8350_reg_read(wm8350, WM8350_POWER_MGMT_5);
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+ wm8350_reg_write(wm8350, WM8350_POWER_MGMT_5, reg | WM8350_AUXADC_ENA);
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+
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+ if (scale || vref) {
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+ reg = scale << 13;
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+ reg |= vref << 12;
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+ wm8350_reg_write(wm8350, WM8350_AUX1_READBACK + channel, reg);
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+ }
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+
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+ reg = wm8350_reg_read(wm8350, WM8350_DIGITISER_CONTROL_1);
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+ reg |= 1 << channel | WM8350_AUXADC_POLL;
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+ wm8350_reg_write(wm8350, WM8350_DIGITISER_CONTROL_1, reg);
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+
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+ do {
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+ schedule_timeout_interruptible(1);
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+ reg = wm8350_reg_read(wm8350, WM8350_DIGITISER_CONTROL_1);
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+ } while (tries-- && (reg & WM8350_AUXADC_POLL));
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+
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+ if (!tries)
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+ dev_err(wm8350->dev, "adc chn %d read timeout\n", channel);
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+ else
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+ result = wm8350_reg_read(wm8350,
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+ WM8350_AUX1_READBACK + channel);
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+
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+ /* Turn off the ADC */
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+ reg = wm8350_reg_read(wm8350, WM8350_POWER_MGMT_5);
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+ wm8350_reg_write(wm8350, WM8350_POWER_MGMT_5,
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+ reg & ~WM8350_AUXADC_ENA);
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+
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+ mutex_unlock(&wm8350->auxadc_mutex);
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+
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+ return result & WM8350_AUXADC_DATA1_MASK;
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+}
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+EXPORT_SYMBOL_GPL(wm8350_read_auxadc);
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+
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/*
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* Cache is always host endian.
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*/
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@@ -1239,6 +1287,7 @@ int wm8350_device_init(struct wm8350 *wm8350, int irq,
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}
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}
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+ mutex_init(&wm8350->auxadc_mutex);
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mutex_init(&wm8350->irq_mutex);
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INIT_WORK(&wm8350->irq_work, wm8350_irq_worker);
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if (irq) {
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