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@@ -243,7 +243,8 @@ void ibm4xx_quiesce_eth(u32 *emac0, u32 *emac1)
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*emac1 = EMAC_RESET;
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mtdcr(DCRN_MAL0_CFG, MAL_RESET);
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- while (mfdcr(DCRN_MAL0_CFG) & MAL_RESET) {};
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+ while (mfdcr(DCRN_MAL0_CFG) & MAL_RESET)
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+ ; /* loop until reset takes effect */
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}
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/* Read 4xx EBC bus bridge registers to get mappings of the peripheral
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@@ -515,19 +516,17 @@ void ibm405gp_fixup_clocks(unsigned int sys_clk, unsigned int ser_clk)
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opb = plb / opdv;
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ebc = plb / epdv;
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- if (cpc0_cr0 & 0x80) {
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+ if (cpc0_cr0 & 0x80)
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/* uart0 uses the external clock */
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uart0 = ser_clk;
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- } else {
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+ else
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uart0 = cpu / udiv;
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- }
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- if (cpc0_cr0 & 0x40) {
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+ if (cpc0_cr0 & 0x40)
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/* uart1 uses the external clock */
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uart1 = ser_clk;
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- } else {
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+ else
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uart1 = cpu / udiv;
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- }
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/* setup the timebase clock to tick at the cpu frequency */
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cpc0_cr1 = cpc0_cr1 & ~0x00800000;
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