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@@ -182,9 +182,6 @@ static int rtl2830_init(struct dvb_frontend *fe)
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{
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struct rtl2830_priv *priv = fe->demodulator_priv;
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int ret, i;
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- u64 num;
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- u8 buf[3], tmp;
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- u32 if_ctl;
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struct rtl2830_reg_val_mask tab[] = {
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{ 0x00d, 0x01, 0x03 },
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{ 0x00d, 0x10, 0x10 },
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@@ -240,26 +237,6 @@ static int rtl2830_init(struct dvb_frontend *fe)
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if (ret)
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goto err;
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- num = priv->cfg.if_dvbt % priv->cfg.xtal;
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- num *= 0x400000;
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- num = div_u64(num, priv->cfg.xtal);
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- num = -num;
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- if_ctl = num & 0x3fffff;
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- dev_dbg(&priv->i2c->dev, "%s: if_ctl=%08x\n", __func__, if_ctl);
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-
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- ret = rtl2830_rd_reg_mask(priv, 0x119, &tmp, 0xc0); /* b[7:6] */
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- if (ret)
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- goto err;
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-
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- buf[0] = tmp << 6;
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- buf[0] = (if_ctl >> 16) & 0x3f;
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- buf[1] = (if_ctl >> 8) & 0xff;
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- buf[2] = (if_ctl >> 0) & 0xff;
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-
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- ret = rtl2830_wr_regs(priv, 0x119, buf, 3);
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- if (ret)
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- goto err;
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-
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/* TODO: spec init */
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/* soft reset */
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@@ -301,6 +278,9 @@ static int rtl2830_set_frontend(struct dvb_frontend *fe)
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struct rtl2830_priv *priv = fe->demodulator_priv;
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struct dtv_frontend_properties *c = &fe->dtv_property_cache;
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int ret, i;
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+ u64 num;
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+ u8 buf[3], tmp;
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+ u32 if_ctl, if_frequency;
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static u8 bw_params1[3][34] = {
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{
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0x1f, 0xf0, 0x1f, 0xf0, 0x1f, 0xfa, 0x00, 0x17, 0x00, 0x41,
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@@ -325,7 +305,6 @@ static int rtl2830_set_frontend(struct dvb_frontend *fe)
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{0xae, 0xba, 0xf3, 0x26, 0x66, 0x64,}, /* 8 MHz */
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};
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-
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dev_dbg(&priv->i2c->dev,
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"%s: frequency=%d bandwidth_hz=%d inversion=%d\n",
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__func__, c->frequency, c->bandwidth_hz, c->inversion);
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@@ -353,6 +332,36 @@ static int rtl2830_set_frontend(struct dvb_frontend *fe)
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if (ret)
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goto err;
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+ /* program if frequency */
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+ if (fe->ops.tuner_ops.get_if_frequency)
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+ ret = fe->ops.tuner_ops.get_if_frequency(fe, &if_frequency);
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+ else
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+ ret = -EINVAL;
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+
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+ if (ret < 0)
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+ goto err;
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+
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+ num = if_frequency % priv->cfg.xtal;
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+ num *= 0x400000;
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+ num = div_u64(num, priv->cfg.xtal);
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+ num = -num;
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+ if_ctl = num & 0x3fffff;
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+ dev_dbg(&priv->i2c->dev, "%s: if_frequency=%d if_ctl=%08x\n",
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+ __func__, if_frequency, if_ctl);
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+
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+ ret = rtl2830_rd_reg_mask(priv, 0x119, &tmp, 0xc0); /* b[7:6] */
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+ if (ret)
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+ goto err;
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+
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+ buf[0] = tmp << 6;
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+ buf[0] |= (if_ctl >> 16) & 0x3f;
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+ buf[1] = (if_ctl >> 8) & 0xff;
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+ buf[2] = (if_ctl >> 0) & 0xff;
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+
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+ ret = rtl2830_wr_regs(priv, 0x119, buf, 3);
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+ if (ret)
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+ goto err;
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+
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/* 1/2 split I2C write */
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ret = rtl2830_wr_regs(priv, 0x11c, &bw_params1[i][0], 17);
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if (ret)
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