[PATCH] ppc32: In the boot code, don't rely on BASE_BAUD directly

Modifies serial_init to get base baud rate from the rs_table entry instead
of BAUD_BASE.  This patch eliminates duplication between the
SERIAL_PORT_DFNS macro and BAUD_BASE.  Without the patch, if a port set the
baud rate in SERIAL_PORT_DFNS, but did not update BASE_BAUD, the BASE_BAUD
value would still be used.

Signed-off-by: Grant Likely <grant.likely@gdcanada.com>
Signed-off-by: Tom Rini <trini@kernel.crashing.org>
Cc: Russell King <rmk@arm.linux.org.uk>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

arch/ppc/boot/common/ns16550.c

@@ -23,7 +23,7 @@ static int shift;
 
 unsigned long serial_init(int chan, void *ignored)
 {
-	unsigned long com_port;
+	unsigned long com_port, base_baud;
 	unsigned char lcr, dlm;
 
 	/* We need to find out which type io we're expecting.  If it's
@@ -43,6 +43,8 @@ unsigned long serial_init(int chan, void *ignored)
 
 	/* How far apart the registers are. */
 	shift = rs_table[chan].iomem_reg_shift;
+	/* Base baud.. */
+	base_baud = rs_table[chan].baud_base;
 	
 	/* save the LCR */
 	lcr = inb(com_port + (UART_LCR << shift));
@@ -62,9 +64,9 @@ unsigned long serial_init(int chan, void *ignored)
 	else {
 		/* Input clock. */
 		outb(com_port + (UART_DLL << shift),
-		     (BASE_BAUD / SERIAL_BAUD) & 0xFF);
+		     (base_baud / SERIAL_BAUD) & 0xFF);
 		outb(com_port + (UART_DLM << shift),
-		     (BASE_BAUD / SERIAL_BAUD) >> 8);
+		     (base_baud / SERIAL_BAUD) >> 8);
 		/* 8 data, 1 stop, no parity */
 		outb(com_port + (UART_LCR << shift), 0x03);
 		/* RTS/DTR */