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@@ -8152,7 +8152,11 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
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/* Prevent chip from dropping frames when flow control
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* is enabled.
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*/
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- tw32_f(MAC_LOW_WMARK_MAX_RX_FRAME, 2);
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+ if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
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+ val = 1;
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+ else
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+ val = 2;
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+ tw32_f(MAC_LOW_WMARK_MAX_RX_FRAME, val);
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704 &&
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(tp->tg3_flags2 & TG3_FLG2_PHY_SERDES)) {
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@@ -14091,9 +14095,22 @@ static void __devinit tg3_init_link_config(struct tg3 *tp)
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static void __devinit tg3_init_bufmgr_config(struct tg3 *tp)
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{
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- if (tp->tg3_flags2 & TG3_FLG2_5705_PLUS &&
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- GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717 &&
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- GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_57765) {
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+ if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
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+ GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) {
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+ tp->bufmgr_config.mbuf_read_dma_low_water =
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+ DEFAULT_MB_RDMA_LOW_WATER_5705;
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+ tp->bufmgr_config.mbuf_mac_rx_low_water =
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+ DEFAULT_MB_MACRX_LOW_WATER_57765;
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+ tp->bufmgr_config.mbuf_high_water =
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+ DEFAULT_MB_HIGH_WATER_57765;
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+
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+ tp->bufmgr_config.mbuf_read_dma_low_water_jumbo =
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+ DEFAULT_MB_RDMA_LOW_WATER_5705;
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+ tp->bufmgr_config.mbuf_mac_rx_low_water_jumbo =
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+ DEFAULT_MB_MACRX_LOW_WATER_JUMBO_57765;
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+ tp->bufmgr_config.mbuf_high_water_jumbo =
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+ DEFAULT_MB_HIGH_WATER_JUMBO_57765;
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+ } else if (tp->tg3_flags2 & TG3_FLG2_5705_PLUS) {
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tp->bufmgr_config.mbuf_read_dma_low_water =
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DEFAULT_MB_RDMA_LOW_WATER_5705;
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tp->bufmgr_config.mbuf_mac_rx_low_water =
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