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@@ -62,6 +62,10 @@ enum rockchip_pinctrl_type {
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RK3188,
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};
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+enum rockchip_pin_bank_type {
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+ COMMON_BANK,
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+};
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+
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/**
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* @reg_base: register base of the gpio bank
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* @clk: clock of the gpio bank
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@@ -86,6 +90,7 @@ struct rockchip_pin_bank {
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u8 nr_pins;
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char *name;
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u8 bank_num;
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+ enum rockchip_pin_bank_type bank_type;
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bool valid;
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struct device_node *of_node;
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struct rockchip_pinctrl *drvdata;
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@@ -668,7 +673,10 @@ static const struct pinconf_ops rockchip_pinconf_ops = {
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.pin_config_set = rockchip_pinconf_set,
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};
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-static const char *gpio_compat = "rockchip,gpio-bank";
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+static const struct of_device_id rockchip_bank_match[] = {
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+ { .compatible = "rockchip,gpio-bank" },
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+ {},
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+};
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static void rockchip_pinctrl_child_count(struct rockchip_pinctrl *info,
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struct device_node *np)
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@@ -676,7 +684,7 @@ static void rockchip_pinctrl_child_count(struct rockchip_pinctrl *info,
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struct device_node *child;
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for_each_child_of_node(np, child) {
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- if (of_device_is_compatible(child, gpio_compat))
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+ if (of_match_node(rockchip_bank_match, child))
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continue;
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info->nfunctions++;
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@@ -819,8 +827,9 @@ static int rockchip_pinctrl_parse_dt(struct platform_device *pdev,
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i = 0;
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for_each_child_of_node(np, child) {
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- if (of_device_is_compatible(child, gpio_compat))
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+ if (of_match_node(rockchip_bank_match, child))
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continue;
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+
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ret = rockchip_pinctrl_parse_functions(child, info, i++);
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if (ret) {
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dev_err(&pdev->dev, "failed to parse function\n");
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@@ -1217,6 +1226,8 @@ static int rockchip_get_bank_data(struct rockchip_pin_bank *bank,
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if (IS_ERR(bank->reg_base))
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return PTR_ERR(bank->reg_base);
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+ bank->bank_type = COMMON_BANK;
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+
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bank->irq = irq_of_parse_and_map(bank->of_node, 0);
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bank->clk = of_clk_get(bank->of_node, 0);
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