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@@ -117,24 +117,14 @@ struct controller {
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#define POWERON_STATE 3
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#define POWEROFF_STATE 4
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-/* Field definitions in Slot Capabilities Register */
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-#define ATTN_BUTTN_PRSN 0x00000001
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-#define PWR_CTRL_PRSN 0x00000002
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-#define MRL_SENS_PRSN 0x00000004
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-#define ATTN_LED_PRSN 0x00000008
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-#define PWR_LED_PRSN 0x00000010
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-#define HP_SUPR_RM_SUP 0x00000020
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-#define EMI_PRSN 0x00020000
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-#define NO_CMD_CMPL_SUP 0x00040000
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-
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-#define ATTN_BUTTN(ctrl) ((ctrl)->slot_cap & ATTN_BUTTN_PRSN)
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-#define POWER_CTRL(ctrl) ((ctrl)->slot_cap & PWR_CTRL_PRSN)
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-#define MRL_SENS(ctrl) ((ctrl)->slot_cap & MRL_SENS_PRSN)
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-#define ATTN_LED(ctrl) ((ctrl)->slot_cap & ATTN_LED_PRSN)
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-#define PWR_LED(ctrl) ((ctrl)->slot_cap & PWR_LED_PRSN)
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-#define HP_SUPR_RM(ctrl) ((ctrl)->slot_cap & HP_SUPR_RM_SUP)
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-#define EMI(ctrl) ((ctrl)->slot_cap & EMI_PRSN)
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-#define NO_CMD_CMPL(ctrl) ((ctrl)->slot_cap & NO_CMD_CMPL_SUP)
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+#define ATTN_BUTTN(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_ABP)
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+#define POWER_CTRL(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_PCP)
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+#define MRL_SENS(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_MRLSP)
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+#define ATTN_LED(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_AIP)
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+#define PWR_LED(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_PIP)
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+#define HP_SUPR_RM(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_HPS)
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+#define EMI(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_EIP)
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+#define NO_CMD_CMPL(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_NCCS)
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#define PSN(ctrl) ((ctrl)->slot_cap >> 19)
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extern int pciehp_sysfs_enable_slot(struct slot *slot);
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