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@@ -131,9 +131,9 @@ static void show_ecr_verbose(struct pt_regs *regs)
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/* For DTLB Miss or ProtV, display the memory involved too */
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if (vec == ECR_V_DTLB_MISS) {
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- pr_cont("Invalid %s 0x%08lx by insn @ 0x%08lx\n",
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- (cause_code == 0x01) ? "Read From" :
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- ((cause_code == 0x02) ? "Write to" : "EX"),
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+ pr_cont("Invalid %s @ 0x%08lx by insn @ 0x%08lx\n",
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+ (cause_code == 0x01) ? "Read" :
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+ ((cause_code == 0x02) ? "Write" : "EX"),
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address, regs->ret);
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} else if (vec == ECR_V_ITLB_MISS) {
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pr_cont("Insn could not be fetched\n");
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@@ -144,14 +144,12 @@ static void show_ecr_verbose(struct pt_regs *regs)
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} else if (vec == ECR_V_PROTV) {
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if (cause_code == ECR_C_PROTV_INST_FETCH)
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pr_cont("Execute from Non-exec Page\n");
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- else if (cause_code == ECR_C_PROTV_LOAD)
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- pr_cont("Read from Non-readable Page\n");
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- else if (cause_code == ECR_C_PROTV_STORE)
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- pr_cont("Write to Non-writable Page\n");
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- else if (cause_code == ECR_C_PROTV_XCHG)
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- pr_cont("Data exchange protection violation\n");
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else if (cause_code == ECR_C_PROTV_MISALIG_DATA)
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pr_cont("Misaligned r/w from 0x%08lx\n", address);
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+ else
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+ pr_cont("%s access not allowed on page\n",
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+ (cause_code == 0x01) ? "Read" :
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+ ((cause_code == 0x02) ? "Write" : "EX"));
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} else if (vec == ECR_V_INSN_ERR) {
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pr_cont("Illegal Insn\n");
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} else {
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