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@@ -375,14 +375,23 @@ static void pxamci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
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if (host->clkrt == CLKRT_OFF)
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clk_enable(host->clk);
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- /*
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- * clk might result in a lower divisor than we
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- * desire. check for that condition and adjust
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- * as appropriate.
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- */
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- if (rate / clk > ios->clock)
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- clk <<= 1;
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- host->clkrt = fls(clk) - 1;
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+ if (ios->clock == 26000000) {
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+ /* to support 26MHz on pxa300/pxa310 */
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+ host->clkrt = 7;
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+ } else {
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+ /* to handle (19.5MHz, 26MHz) */
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+ if (!clk)
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+ clk = 1;
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+
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+ /*
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+ * clk might result in a lower divisor than we
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+ * desire. check for that condition and adjust
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+ * as appropriate.
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+ */
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+ if (rate / clk > ios->clock)
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+ clk <<= 1;
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+ host->clkrt = fls(clk) - 1;
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+ }
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/*
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* we write clkrt on the next command
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@@ -519,7 +528,8 @@ static int pxamci_probe(struct platform_device *pdev)
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* Calculate minimum clock rate, rounding up.
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*/
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mmc->f_min = (host->clkrate + 63) / 64;
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- mmc->f_max = host->clkrate;
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+ mmc->f_max = (cpu_is_pxa300() || cpu_is_pxa310()) ? 26000000
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+ : host->clkrate;
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mmc->ocr_avail = host->pdata ?
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host->pdata->ocr_mask :
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@@ -529,6 +539,9 @@ static int pxamci_probe(struct platform_device *pdev)
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if (!cpu_is_pxa21x() && !cpu_is_pxa25x()) {
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mmc->caps |= MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ;
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host->cmdat |= CMDAT_SDIO_INT_EN;
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+ if (cpu_is_pxa300() || cpu_is_pxa310())
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+ mmc->caps |= MMC_CAP_MMC_HIGHSPEED |
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+ MMC_CAP_SD_HIGHSPEED;
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}
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host->sg_cpu = dma_alloc_coherent(&pdev->dev, PAGE_SIZE, &host->sg_dma, GFP_KERNEL);
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