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@@ -304,9 +304,9 @@ static bool e1000_phy_is_accessible_pchlan(struct e1000_hw *hw)
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u16 phy_reg;
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u32 phy_id;
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- hw->phy.ops.read_reg_locked(hw, PHY_ID1, &phy_reg);
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+ e1e_rphy_locked(hw, PHY_ID1, &phy_reg);
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phy_id = (u32)(phy_reg << 16);
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- hw->phy.ops.read_reg_locked(hw, PHY_ID2, &phy_reg);
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+ e1e_rphy_locked(hw, PHY_ID2, &phy_reg);
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phy_id |= (u32)(phy_reg & PHY_REVISION_MASK);
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if (hw->phy.id) {
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@@ -1271,8 +1271,7 @@ static s32 e1000_sw_lcd_config_ich8lan(struct e1000_hw *hw)
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reg_addr &= PHY_REG_MASK;
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reg_addr |= phy_page;
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- ret_val = phy->ops.write_reg_locked(hw, (u32)reg_addr,
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- reg_data);
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+ ret_val = e1e_wphy_locked(hw, (u32)reg_addr, reg_data);
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if (ret_val)
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goto release;
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}
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@@ -1309,8 +1308,8 @@ static s32 e1000_k1_gig_workaround_hv(struct e1000_hw *hw, bool link)
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/* Disable K1 when link is 1Gbps, otherwise use the NVM setting */
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if (link) {
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if (hw->phy.type == e1000_phy_82578) {
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- ret_val = hw->phy.ops.read_reg_locked(hw, BM_CS_STATUS,
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- &status_reg);
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+ ret_val = e1e_rphy_locked(hw, BM_CS_STATUS,
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+ &status_reg);
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if (ret_val)
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goto release;
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@@ -1325,8 +1324,7 @@ static s32 e1000_k1_gig_workaround_hv(struct e1000_hw *hw, bool link)
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}
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if (hw->phy.type == e1000_phy_82577) {
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- ret_val = hw->phy.ops.read_reg_locked(hw, HV_M_STATUS,
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- &status_reg);
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+ ret_val = e1e_rphy_locked(hw, HV_M_STATUS, &status_reg);
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if (ret_val)
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goto release;
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@@ -1341,15 +1339,13 @@ static s32 e1000_k1_gig_workaround_hv(struct e1000_hw *hw, bool link)
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}
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/* Link stall fix for link up */
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- ret_val = hw->phy.ops.write_reg_locked(hw, PHY_REG(770, 19),
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- 0x0100);
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+ ret_val = e1e_wphy_locked(hw, PHY_REG(770, 19), 0x0100);
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if (ret_val)
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goto release;
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} else {
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/* Link stall fix for link down */
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- ret_val = hw->phy.ops.write_reg_locked(hw, PHY_REG(770, 19),
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- 0x4100);
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+ ret_val = e1e_wphy_locked(hw, PHY_REG(770, 19), 0x4100);
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if (ret_val)
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goto release;
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}
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@@ -1448,7 +1444,7 @@ static s32 e1000_oem_bits_config_ich8lan(struct e1000_hw *hw, bool d0_state)
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mac_reg = er32(PHY_CTRL);
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- ret_val = hw->phy.ops.read_reg_locked(hw, HV_OEM_BITS, &oem_reg);
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+ ret_val = e1e_rphy_locked(hw, HV_OEM_BITS, &oem_reg);
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if (ret_val)
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goto release;
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@@ -1475,7 +1471,7 @@ static s32 e1000_oem_bits_config_ich8lan(struct e1000_hw *hw, bool d0_state)
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!hw->phy.ops.check_reset_block(hw))
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oem_reg |= HV_OEM_BITS_RESTART_AN;
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- ret_val = hw->phy.ops.write_reg_locked(hw, HV_OEM_BITS, oem_reg);
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+ ret_val = e1e_wphy_locked(hw, HV_OEM_BITS, oem_reg);
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release:
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hw->phy.ops.release(hw);
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@@ -1571,11 +1567,10 @@ static s32 e1000_hv_phy_workarounds_ich8lan(struct e1000_hw *hw)
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ret_val = hw->phy.ops.acquire(hw);
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if (ret_val)
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return ret_val;
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- ret_val = hw->phy.ops.read_reg_locked(hw, BM_PORT_GEN_CFG, &phy_data);
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+ ret_val = e1e_rphy_locked(hw, BM_PORT_GEN_CFG, &phy_data);
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if (ret_val)
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goto release;
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- ret_val = hw->phy.ops.write_reg_locked(hw, BM_PORT_GEN_CFG,
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- phy_data & 0x00FF);
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+ ret_val = e1e_wphy_locked(hw, BM_PORT_GEN_CFG, phy_data & 0x00FF);
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release:
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hw->phy.ops.release(hw);
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@@ -1807,20 +1802,18 @@ static s32 e1000_lv_phy_workarounds_ich8lan(struct e1000_hw *hw)
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ret_val = hw->phy.ops.acquire(hw);
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if (ret_val)
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return ret_val;
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- ret_val = hw->phy.ops.write_reg_locked(hw, I82579_EMI_ADDR,
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- I82579_MSE_THRESHOLD);
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+ ret_val = e1e_wphy_locked(hw, I82579_EMI_ADDR, I82579_MSE_THRESHOLD);
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if (ret_val)
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goto release;
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/* set MSE higher to enable link to stay up when noise is high */
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- ret_val = hw->phy.ops.write_reg_locked(hw, I82579_EMI_DATA, 0x0034);
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+ ret_val = e1e_wphy_locked(hw, I82579_EMI_DATA, 0x0034);
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if (ret_val)
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goto release;
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- ret_val = hw->phy.ops.write_reg_locked(hw, I82579_EMI_ADDR,
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- I82579_MSE_LINK_DOWN);
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+ ret_val = e1e_wphy_locked(hw, I82579_EMI_ADDR, I82579_MSE_LINK_DOWN);
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if (ret_val)
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goto release;
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/* drop link after 5 times MSE threshold was reached */
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- ret_val = hw->phy.ops.write_reg_locked(hw, I82579_EMI_DATA, 0x0005);
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+ ret_val = e1e_wphy_locked(hw, I82579_EMI_DATA, 0x0005);
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release:
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hw->phy.ops.release(hw);
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@@ -1995,12 +1988,10 @@ static s32 e1000_post_phy_reset_ich8lan(struct e1000_hw *hw)
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ret_val = hw->phy.ops.acquire(hw);
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if (ret_val)
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return ret_val;
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- ret_val = hw->phy.ops.write_reg_locked(hw, I82579_EMI_ADDR,
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- I82579_LPI_UPDATE_TIMER);
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+ ret_val = e1e_wphy_locked(hw, I82579_EMI_ADDR,
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+ I82579_LPI_UPDATE_TIMER);
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if (!ret_val)
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- ret_val = hw->phy.ops.write_reg_locked(hw,
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- I82579_EMI_DATA,
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- 0x1387);
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+ ret_val = e1e_wphy_locked(hw, I82579_EMI_DATA, 0x1387);
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hw->phy.ops.release(hw);
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}
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@@ -3477,6 +3468,13 @@ static void e1000_initialize_hw_bits_ich8lan(struct e1000_hw *hw)
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*/
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reg = er32(RFCTL);
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reg |= (E1000_RFCTL_NFSW_DIS | E1000_RFCTL_NFSR_DIS);
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+
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+ /*
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+ * Disable IPv6 extension header parsing because some malformed
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+ * IPv6 headers can hang the Rx.
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+ */
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+ if (hw->mac.type == e1000_ich8lan)
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+ reg |= (E1000_RFCTL_IPV6_EX_DIS | E1000_RFCTL_NEW_IPV6_EXT_DIS);
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ew32(RFCTL, reg);
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}
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