|
@@ -29,9 +29,10 @@
|
|
|
void __init qemu_e500_pic_init(void)
|
|
|
{
|
|
|
struct mpic *mpic;
|
|
|
+ unsigned int flags = MPIC_BIG_ENDIAN | MPIC_SINGLE_DEST_CPU |
|
|
|
+ MPIC_ENABLE_COREINT;
|
|
|
|
|
|
- mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN | MPIC_SINGLE_DEST_CPU,
|
|
|
- 0, 256, " OpenPIC ");
|
|
|
+ mpic = mpic_alloc(NULL, 0, flags, 0, 256, " OpenPIC ");
|
|
|
|
|
|
BUG_ON(mpic == NULL);
|
|
|
mpic_init(mpic);
|
|
@@ -66,7 +67,7 @@ define_machine(qemu_e500) {
|
|
|
#ifdef CONFIG_PCI
|
|
|
.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
|
|
|
#endif
|
|
|
- .get_irq = mpic_get_irq,
|
|
|
+ .get_irq = mpic_get_coreint_irq,
|
|
|
.restart = fsl_rstcr_restart,
|
|
|
.calibrate_decr = generic_calibrate_decr,
|
|
|
.progress = udbg_progress,
|