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@@ -213,10 +213,9 @@ void ath9k_hw_get_channel_centers(struct ath_hw *ah,
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centers->ctl_center =
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centers->ctl_center =
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centers->synth_center - (extoff * HT40_CHANNEL_CENTER_SHIFT);
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centers->synth_center - (extoff * HT40_CHANNEL_CENTER_SHIFT);
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+ /* 25 MHz spacing is supported by hw but not on upper layers */
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centers->ext_center =
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centers->ext_center =
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- centers->synth_center + (extoff *
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- ((ah->extprotspacing == ATH9K_HT_EXTPROTSPACING_20) ?
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- HT40_CHANNEL_CENTER_SHIFT : 15));
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+ centers->synth_center + (extoff * HT40_CHANNEL_CENTER_SHIFT);
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}
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}
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/******************/
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/******************/
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@@ -1759,8 +1758,6 @@ static void ath9k_hw_set_regs(struct ath_hw *ah, struct ath9k_channel *chan,
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(chan->chanmode == CHANNEL_G_HT40PLUS))
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(chan->chanmode == CHANNEL_G_HT40PLUS))
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phymode |= AR_PHY_FC_DYN2040_PRI_CH;
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phymode |= AR_PHY_FC_DYN2040_PRI_CH;
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- if (ah->extprotspacing == ATH9K_HT_EXTPROTSPACING_25)
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- phymode |= AR_PHY_FC_DYN2040_EXT_CH;
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}
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}
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REG_WRITE(ah, AR_PHY_TURBO, phymode);
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REG_WRITE(ah, AR_PHY_TURBO, phymode);
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@@ -2333,7 +2330,6 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
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u64 tsf = 0;
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u64 tsf = 0;
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int i, rx_chainmask, r;
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int i, rx_chainmask, r;
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- ah->extprotspacing = sc->ht_extprotspacing;
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ah->txchainmask = common->tx_chainmask;
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ah->txchainmask = common->tx_chainmask;
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ah->rxchainmask = common->rx_chainmask;
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ah->rxchainmask = common->rx_chainmask;
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