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@@ -14,6 +14,7 @@
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#define MX25_I2C1_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0x80000)
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#define MX25_I2C1_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0x80000)
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#define MX25_I2C3_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0x84000)
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#define MX25_I2C3_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0x84000)
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#define MX25_I2C2_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0x98000)
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#define MX25_I2C2_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0x98000)
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+#define MX25_CSPI1_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0xa4000)
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#define MX25_IOMUXC_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0xac000)
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#define MX25_IOMUXC_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0xac000)
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#define MX25_CRM_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0x80000)
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#define MX25_CRM_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0x80000)
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@@ -33,18 +34,23 @@
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#define MX25_UART1_BASE_ADDR 0x43f90000
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#define MX25_UART1_BASE_ADDR 0x43f90000
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#define MX25_UART2_BASE_ADDR 0x43f94000
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#define MX25_UART2_BASE_ADDR 0x43f94000
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+#define MX25_CSPI3_BASE_ADDR 0x50004000
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+#define MX25_CSPI2_BASE_ADDR 0x50010000
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#define MX25_FEC_BASE_ADDR 0x50038000
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#define MX25_FEC_BASE_ADDR 0x50038000
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#define MX25_NFC_BASE_ADDR 0xbb000000
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#define MX25_NFC_BASE_ADDR 0xbb000000
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#define MX25_DRYICE_BASE_ADDR 0x53ffc000
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#define MX25_DRYICE_BASE_ADDR 0x53ffc000
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#define MX25_LCDC_BASE_ADDR 0x53fbc000
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#define MX25_LCDC_BASE_ADDR 0x53fbc000
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+#define MX25_INT_CSPI3 0
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#define MX25_INT_I2C1 3
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#define MX25_INT_I2C1 3
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#define MX25_INT_I2C2 4
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#define MX25_INT_I2C2 4
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#define MX25_INT_I2C3 10
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#define MX25_INT_I2C3 10
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+#define MX25_INT_CSPI2 13
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+#define MX25_INT_CSPI1 14
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#define MX25_INT_DRYICE 25
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#define MX25_INT_DRYICE 25
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-#define MX25_INT_FEC 57
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#define MX25_INT_NANDFC 33
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#define MX25_INT_NANDFC 33
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#define MX25_INT_LCDC 39
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#define MX25_INT_LCDC 39
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+#define MX25_INT_FEC 57
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#if defined(IMX_NEEDS_DEPRECATED_SYMBOLS)
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#if defined(IMX_NEEDS_DEPRECATED_SYMBOLS)
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#define UART1_BASE_ADDR MX25_UART1_BASE_ADDR
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#define UART1_BASE_ADDR MX25_UART1_BASE_ADDR
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